Fabrication method for flash memory source line and flash...

Details Fabrication method for flash memory source line and flash... Fabrication method for flash memory source line and flash...

2006-10-31

2006-10-31

Dang, Phuc T. (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S595000

Reexamination Certificate

active

07129134

ABSTRACT:
A fabrication method for flash memory. The method comprises providing a substrate, and a first insulation layer, a first conductive layer, a second insulation layer thereon. The second insulation layer is patterned to form a first opening and reveal a part of the first conductive layer, and a third insulation layer is formed on the first opening sidewall to form a second opening. The first conductive layer and the first insulation layer beneath the second opening are etched to expose the substrate surface, and a spacer is formed on the second opening sidewall. A source region is formed in the exposed substrate and a source line with a concave surface is formed in the second opening. A mask layer is formed on the source line concave surface.

REFERENCES:
patent: 6649471 (2003-11-01), Cho et al.

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