Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-01-11
2005-01-11
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S200000
Reexamination Certificate
active
06841446
ABSTRACT:
In a fabrication method of a flash memory device, a first oxide layer is formed on the substrate in the memory cell region and in the peripheral circuit region. A first conductive layer is formed and defined to form a plurality of floating gates in the memory cell region. A second oxide layer and a silicon nitride layer are sequentially formed in the memory cell region and in the peripheral circuit region. The first conductive layer, the second oxide layer and the silicon nitride layer in the peripheral circuit region are removed. A doped region is formed in the peripheral circuit region. A third oxide layer is formed in the memory cell region and in the peripheral circuit region by wet rapid thermal oxidation. Thereafter, a second conductive layer is deposited to form concurrently a control gate in the memory cell region and a gate in the peripheral circuit region.
REFERENCES:
patent: 5635416 (1997-06-01), Chen et al.
patent: 6004847 (1999-12-01), Clementi et al.
patent: 6204159 (2001-03-01), Chang et al.
patent: 6429073 (2002-08-01), Furuhata et al.
Han Tzung-Ting
Su Chun-Lein
J.C. Patents
Macronix International Co. Ltd.
Nelms David
Vu David
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