Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-03
1999-02-16
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438241, H01L 218242
Patent
active
058720324
ABSTRACT:
A DRAM cell structure having charge amplification is disclosed. The DRAM cell has a capacitor to store an electrical charge. The DRAM cell further has a MOS transistor. The gate of the MOS transistor is coupled to a word line control to activate and deactivate the MOS transistor. The drain MOS transistor is coupled to one plate of the capacitor. The DRAM cell has a bipolar transistor to amplify the electrical charge stored on the capacitor. The bipolar transistor has a base that is the source for the MOS transistor. The base of the bipolar transistors is formed by masking and implanting a material of the first conductivity type adjacent to the gate to form the base. The collector of the bipolar transistor is the semiconductor substrate. The bipolar transistor has an emitter coupled to a bit-lines control which when activated will sense the charge amplified by the bipolar transistor. The emitter is formed by masking and implanting a material of the second conductivity type within the material of the first conductivity type. The emitter is implanted to ensure a large overlap of the gate of the emitter. The overlap of the gate of the emitter will ensure generation of gate induced drain leakage current to discharge the storage capacitor during writing of a logical "0" to the storage capacitor.
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Ackerman Stephen B.
Chang Joni
Knowles Bill
Saile George O.
Vanguard International Semiconductor Corporation
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