Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-06-05
2007-06-05
Smoot, Stephen W. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S478000, C438S482000, C438S738000
Reexamination Certificate
active
10780826
ABSTRACT:
The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain areas and crystalline films in source/drain regions. By using an etch which is selective to amorphous silicon, the amorphous material may be removed. This may avoid some problems associated with selective deposition of the doped silicon material.
REFERENCES:
patent: 5498578 (1996-03-01), Steele et al.
patent: 6011277 (2000-01-01), Yamazaki
patent: 6224713 (2001-05-01), Hembree et al.
patent: 6746967 (2004-06-01), Brask et al.
patent: 6770568 (2004-08-01), Brask
patent: 6797622 (2004-09-01), Brask et al.
patent: 6858483 (2005-02-01), Doczy et al.
patent: 6946350 (2005-09-01), Lindert et al.
patent: 2002/0034864 (2002-03-01), Mizushima et al.
patent: 2004/0097047 (2004-05-01), Natzie et al.
patent: 2005/0111806 (2005-05-01), Brask et al.
Stanley Wolf Silicon Processing for the VSLI Era vol. 1 Lattice Press 1986 (pp. 142, 169, and 179).
Boyanov Boyan
Brask Justin K.
Lindert Nick
Murthy Anand
Westmeyer Andrew N.
Intel Corporation
Smoot Stephen W.
Trop Pruner & Hu P.C.
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