Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-12-11
2007-12-11
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S386000, C438S593000, C438S257000
Reexamination Certificate
active
11320823
ABSTRACT:
A fabricating method of a semiconductor device includes: forming a first metal layer on a substrate and patterning the first metal layer to form a bottom metal line and a bottom electrode of a capacitor; forming an interlayer insulating layer on the resulting structure; forming a via hole in the interlayer insulating layer and forming a contact; etching the interlayer insulating layer to form a trench exposing the bottom electrode; forming a dielectric layer on the resulting structure, and removing the dielectric layer formed outside the trench; and forming a second metal layer on the resulting structure to form a top metal line and a top electrode of the capacitor.
REFERENCES:
patent: 6100134 (2000-08-01), Ohno
patent: 2005/0221539 (2005-10-01), Kim et al.
patent: 2006/0194348 (2006-08-01), Araujo et al.
patent: 2001-320026 (2001-11-01), None
patent: 2001-620026 (2001-11-01), None
Office Action from the Korean Intellectual Property Office dated May 16, 2006, in counterpart Korean Application No. 10-2004-0117827.
Dongbu Electronics Co. Ltd.
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Le Dung A.
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