Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-07-29
2008-07-29
Dang, Trung (Department: 2892)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S316000, C257SE29129
Reexamination Certificate
active
11306384
ABSTRACT:
A method for fabricating a non-volatile memory is described. A substrate having isolation structures is provided. These isolation structures protrude from the substrate, and a first mask layer is formed on the substrate between the isolation structures. A second mask layer is formed on the substrate. The second and the first mask layers are patterned to form openings exposing part of the surface of the substrate and the isolation structures. A tunneling dielectric layer and a first conductive layer are formed on the substrate. The first conductive layer is filled in the opening, and is divided into blocks by the isolation structures, the second mask layer, and the first mask layer. An inter-gate dielectric layer is formed on the substrate. A second conductive layer is formed on the substrate to fill up the openings. Doped regions are formed in the substrate on both sides of the second conductive layer.
REFERENCES:
patent: 6133601 (2000-10-01), Watanabe
patent: 2003/0193064 (2003-10-01), Wu
patent: 2006/0081906 (2006-04-01), Jeong
Dang Trung
Jianq Chyun IP Office
Powerchip Semiconductor Corp.
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