Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-12-02
2000-10-10
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438297, 438443, 438589, H01L 21762, H01L 21336
Patent
active
061301337
ABSTRACT:
The present invention provides a fabricating method of a high-voltage device. The invention provides N.sup.-- -type doped regions with properly low doping concentration in order to increase breakdown voltage. Field oxide layers are used as masks in a self-aligned ion implantation step to form N.sup.- -type doped drift regions with a higher doping concentration than the N.sup.-- -type doped regions. A recessed gate is formed so that the channel length is increased and the curvature of the electrical distribution lines on the edge of a drain region nearby a channel is decreased while the device is operated under high voltage.
REFERENCES:
patent: 4520553 (1985-06-01), Kraft
patent: 5470770 (1995-11-01), Takahashi et al.
patent: 5480823 (1996-01-01), Hsu
patent: 6010949 (2000-01-01), Wu
Fourson George
Huang Jiawei
United Microelectronics Corp.
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