Fabricating method of DRAM cylindrical capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S398000, C257SE21647

Reexamination Certificate

active

07456065

ABSTRACT:
A method of manufacturing dynamic random access memory (DRAM) cylindrical capacitor is provided. A substrate having a polysilicon plug formed therein is provided. A dielectric layer having an opening is disposed on the substrate, wherein the opening exposes the polysilicon plug. Thereafter, an amorphous silicon spacer is formed on the sidewall of the opening to expose a portion of the polysilicon plug. Next, a top portion of the exposed polysilicon plug is removed and a seeding method is used to grow a hemispherical silicon grain (HSG) layer on a surface of the amorphous silicon spacer. A capacitor dielectric layer is formed on the surface of the HSG layer and a conductive layer is then formed on the capacitor dielectric layer. As no HSG is formed on the polysilicon plug, and therefore the contact area of the capacitor is not decreased.

REFERENCES:
patent: 6174770 (2001-01-01), Chi
patent: 6300192 (2001-10-01), Kim
patent: 6358795 (2002-03-01), Tseng
patent: 6677217 (2004-01-01), Joo et al.
patent: 6867096 (2005-03-01), Cho et al.
patent: 2002/0024080 (2002-02-01), Derderian et al.
patent: 2005/0042823 (2005-02-01), Chen et al.
patent: 2006/0014385 (2006-01-01), Kim et al.

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