Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-12-04
2007-12-04
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S221000, C438S283000, C438S791000, C438S792000, C438S763000, C438S296000, C257SE21293, C257SE21214, C257SE21483, C257SE21487, C257SE21489, C257SE21498, C257SE21626
Reexamination Certificate
active
11164274
ABSTRACT:
A complementary metal-oxide-semiconductor (CMOS) device comprising a substrate, a first type of metal-oxide-semiconductor (MOS) transistor, a second type of MOS transistor, an etching stop layer, a first stress layer and a second stress layer is provided. The substrate has a first and a second active region. The first active region is isolated from the second active region through an isolation structure. The first type of MOS transistor is disposed in the first active region of the substrate and the second type of MOS transistor is disposed in the second active region of the substrate. The etching stop layer covers conformably the first type of MOS transistor, the second type of MOS transistor and the isolation structure. The first stress layer is disposed on the etching stop layer in the first active region and the second stress layer is disposed on the etching stop layer in the second active region.
REFERENCES:
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patent: 2003/0181005 (2003-09-01), Hachimine et al.
patent: 2006/0172481 (2006-08-01), Tsui et al.
Wolf et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, 1986 by Lattice Press, pp. 429-431 and 434-437.
Wolf et al., Silicon Processing for the VLSI Era, vol. 1″ Process Technology, 1986 by Lattice Press, pp. 429-431 and 434-437.
Chou Pei-Tu
Hung Wen-Han
Yang Min-Chieh
Fourson George
Jianq Chyun IP Office
Maldonado Julio J.
United Microelectronics Corp.
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