Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-06-08
2009-02-03
Le, Dung A. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C438S201000, C438S593000, C438S508000, C257S314000, C257S315000, C257S316000
Reexamination Certificate
active
07485531
ABSTRACT:
A method of fabricating a non-volatile memory is provided. A stacked structure is formed over a substrate, and the stacked structure has a gate dielectric layer and a floating gate thereon. A first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed over the top and the sidewalls of the stacked structure and the exposed substrate. A charge storage layer covers over the top and sidewalls of the stacked structure. Also, a pair of auxiliary gates is formed over the substrate beside the charge storage layer, and a gap is between the auxiliary gates and the charge storage layer.
REFERENCES:
patent: 2006/0203552 (2006-09-01), Chen et al.
patent: 2008/0116502 (2008-05-01), Lutze et al.
Kuo Ming-Chang
Wu Chao-I
J.C. Patents
Le Dung A.
Macronix International Co. Ltd
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