Fabricating method of a dynamic random access memory

Details Fabricating method of a dynamic random access memory Fabricating method of a dynamic random access memory

1998-11-09

2000-08-01

Nelms, David

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438238, 438252, 438695, 438738, 438762, 438787, 437 52, 437 60, 437919, H01L 218249

Patent

active

060965940

ABSTRACT:
The present invention provides a fabricating method and structure of a dynamic random access memory. In this method, a substrate having a transistor thereon is provided. A bit line is formed on the substrate. The bit line is electrically coupled with the transistor through a contact hole. A second dielectric layer having a node contact opening is formed on the bit line. An etching step is performed to etch the bit line. A concave surface is formed on the sidewall of the bit line. Spacer layers are formed on the sidewalls of the node contact opening. Each spacer layer is used to insulate the concave surface. Thus, from the top-view layout, a portion of the node contact opening can overlap with the bit line. Thus, the size of DRAM is effectively reduced.

REFERENCES:
patent: 5872063 (1999-02-01), Chao et al.
patent: 5998255 (1999-12-01), Kung et al.
patent: 6037211 (2000-03-01), Jeng et al.

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