External clock tracking pipelined latch scheme

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S233500

Reexamination Certificate

active

07609565

ABSTRACT:
A flash memory including a first latch having at least one external input to receive at least one command, at least one memory address, and a plurality of data bits, a command decoder coupled to the first latch output; a command latch including a first command latch input, a second command latch input, and a command latch output, the first command latch input to couple to the command decoder output, and the second command latch input to couple to a write command output of an internal clock control generator; and a command register including a first command register input and a second command register input, the first command register input to couple to the command latch output, and the second command register input to couple to an internal latch command output of the internal clock control generator. Additional apparatus, systems, and methods are disclosed.

REFERENCES:
patent: 5450574 (1995-09-01), Madter et al.
patent: 5828896 (1998-10-01), Caudel et al.
patent: 5881002 (1999-03-01), Hamakawa
patent: 6459614 (2002-10-01), Miwa et al.
patent: 2003/0065813 (2003-04-01), Ruehle
patent: 2008/0144376 (2008-06-01), Lee
“Samsung NAND datasheets—Flash Memory, K9XXG08UXA”,Samsung Electronics, 1-43.
Lee, J., et al., “A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications”,IEEE Journal of Solid-State Circuits, 38(11), (Nov. 2003), 1934-1942.
Lee, June, et al., “High-performance 1-Gb-NAND flash memory with 0.12-/spl mu/m technology”,IEEE Journal of Solid-State Circuits, 37(11), (Nov. 2002), 1502-1509.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

External clock tracking pipelined latch scheme does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with External clock tracking pipelined latch scheme, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and External clock tracking pipelined latch scheme will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4131477

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.