Etching a dielectric layer in an integrated circuit...

Details Etching a dielectric layer in an integrated circuit... Etching a dielectric layer in an integrated circuit...

2005-11-29

2005-11-29

Norton, Nadine G. (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S712000, C438S717000, C438S720000, C438S723000

Reexamination Certificate

active

06969685

ABSTRACT:
The invention relates to the etching of a dielectric layer in an integrated circuit (IC) structure having a patterned metal hard mask layer. The method comprises feeding a gas mixture that includes a carbon monoxide (CO) and at least one fluorocarbon gas mixture into a reactor. The gas mixture has no oxygen (O2) gas. The gas mixture is then converted into a plasma. The plasma selectively etches the dielectric layer. Typically, the dielectric layer comprises silicon.

REFERENCES:
patent: 6162587 (2000-12-01), Yang et al.
patent: 6287951 (2001-09-01), Lucas et al.
patent: 6635528 (2003-10-01), Gilbert et al.
patent: 6734096 (2004-05-01), Dalton et al.

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