Etch features with reduced line edge roughness

Details Etch features with reduced line edge roughness Etch features with reduced line edge roughness

2007-09-25

2007-09-25

Vinh, Lan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

C438S689000, C438S709000, C438S710000, C438S722000, C438S778000, C438S240000, C438S357000, C257S410000, C257S406000, C257S411000

Reexamination Certificate

active

11208098

ABSTRACT:
A method for forming a feature in a layer with reduced line edge roughening is provided. A photoresist layer is formed over the layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A sidewall layer with a thickness less than 100 nm is formed over the sidewalls of the photoresist features by performing for a plurality of cycles. Each cycle comprises depositing a layer on the photoresist layer wherein the deposited layer has a thickness between a monolayer to 20 nm. Features are etched into the layer through the photoresist features. The photoresist layer and sidewall layer are stripped.

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