Etch-back process for capping a polymer memory device

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C438S709000, C438S721000, C438S722000, C438S743000

Reexamination Certificate

active

11102004

ABSTRACT:
The present invention leverages an etch-back process to provide an electrode cap for a polymer memory element. This allows the polymer memory element to be formed within a via embedded in layers formed on a substrate. By utilizing the etch-back process, the present invention provides tiny electrical contacts necessary for the proper functioning of polymer memory devices that utilize the vias. In one instance of the present invention, one or more via openings are formed in a dielectric layer to expose an underlying layer. A polymer layer is then formed within the via on the underlying layer with a top electrode material layer deposited over the polymer layer, filling the remaining portion of the via. Excess portions of the top electrode material are then removed by an etching process to form an electrode cap that provides an electrical contact point for the polymer memory element.

REFERENCES:
patent: 6344412 (2002-02-01), Ichikawa et al.
patent: 6756620 (2004-06-01), Li et al.
patent: 6787458 (2004-09-01), Tripsas et al.
patent: 7129133 (2006-10-01), Avanzino et al.
patent: 2005/0227382 (2005-10-01), Hui

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