ESD protection component

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S357000, C257S355000

Reexamination Certificate

active

06876041

ABSTRACT:
The present invention provides an ESD protection component, comprising at least two MOS field effect transistors (FETs) of a first conductivity type and a first well having a first conductivity type. The two MOS FETs have two parallel gates formed on a first semiconductive layer having a second conductivity type. The first well formed on the first semiconductive layer is comprised of a connecting area formed between the MOS FETs, two parallel extension areas formed perpendicular to the gates of the MOS FETs, and a first doping area of the second conductivity type formed in the connecting area. Two SCR are formed with drains of the MOS FETs, the first semiconductive layer, the first well and the first doping region. With the combination of the SCR and NMOS FET, ESD protection efficiency can be substantially enhanced.

REFERENCES:
patent: 3712995 (1973-01-01), Steudel
patent: 4039869 (1977-08-01), Goldman et al.
patent: 4656491 (1987-04-01), Igarashi
patent: 5326994 (1994-07-01), Giebel et al.
patent: 5389842 (1995-02-01), Hardee
patent: 5576557 (1996-11-01), Ker et al.
patent: 5714796 (1998-02-01), Chishiki
patent: 5742085 (1998-04-01), Yu
patent: 6072219 (2000-06-01), Ker et al.

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