ESD protecting circuit and manufacturing method thereof

Details ESD protecting circuit and manufacturing method thereof ESD protecting circuit and manufacturing method thereof

2009-09-01

2010-11-16

Mandala, Victor A (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S223000, C438S224000, C257S355000, C257S546000, C257S173000, C257SE29008, C257SE21135

Reexamination Certificate

active

07833857

ABSTRACT:
An ESD protecting circuit and a manufacturing method thereof are provided. The ESD protecting circuit includes a device isolation layer, first and second high-concentration impurity regions, a third high-concentration impurity region of a complementary type, first and second conductive wells, and a fourth conductive impurity region. The ESD protecting circuit is configured as a field transistor without a gate electrode, and the high breakdown voltage characteristics of the field transistor are lowered by implanting impurity ions, providing an ESD protecting circuit with a low breakdown voltage and low leakage current. Because the leakage current is reduced, the ESD protecting circuit can be used for an analog I/O device that is sensitive to current fluxes. Also, an N-type well may protect a junction of the field transistor.

REFERENCES:
patent: 5166089 (1992-11-01), Chen et al.
patent: 5324982 (1994-06-01), Nakazato et al.
patent: 5856214 (1999-01-01), Yu
patent: 6281554 (2001-08-01), Pan
patent: 6433395 (2002-08-01), Hsu
patent: 6498357 (2002-12-01), Ker et al.
patent: 6600211 (2003-07-01), Collins
patent: 6791146 (2004-09-01), Lai et al.
patent: 6855586 (2005-02-01), Walker et al.
patent: 6921931 (2005-07-01), Higashi et al.
patent: 2002/0050615 (2002-05-01), Ker et al.
patent: 2002/0109190 (2002-08-01), Ker et al.
patent: 2003/0197226 (2003-10-01), Chen et al.
patent: 2005/0151160 (2005-07-01), Salcedo et al.
patent: 2007/0034956 (2007-02-01), Lee et al.

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