Error detection/correction and fault detection/recovery – Pulse or data error handling – Error detection for synchronization control
Reexamination Certificate
1998-11-30
2001-12-25
Decady, Albert (Department: 2784)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error detection for synchronization control
C370S203000, C375S329000, C375S308000
Reexamination Certificate
active
06334203
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the invention
The present invention relates to an error detecting method and device for detecting a phase error in a PSK modulated signal, and a signal demodulating method and device for demodulating a PSK modulated signal.
2. Description of related art
In the prior art, a PSK (phase shift keying) system is known as one modulating means in the case of transmitting a digital signal. In this PSK system, a binary value of a digital signal is expressed by a phase of a modulated signal. For example, if the modulation phase number is 2
M
, a digital signal of M bits can be transmitted at once.
In a signal demodulation device receiving and demodulating this PSK modulated signal, an inphase signal and a quadrature signal are generated from a received modulated signal, a phase difference between a received phase of the modulated signal and a reference phase is detected on the basis of the inphase signal and the quadrature signal, and then, the detected phase difference is fed back to synchronously demodulate the inphase signal and the quadrature signal.
To detect the phase difference of the modulated signal on the basis of the inphase signal and the quadrature signal, is that, as shown in
FIG. 9
, the received phase of the modulated signal is mapped by allocating the inphase signal and the quadrature signal as values of the axis of abscissas and the axis of ordinates in a complex plane, and an interior angle &thgr; between a pair of lines one passing from the origin to the received phase and other passing from the origin to the reference phase, is calculated. Incidentally, in
FIG. 9
, reference phases of a 8-phase modulated signal are plotted in the complex plane.
A specific procedure for detecting the phase difference of the modulated signal on the basis of the inphase signal and the quadrature signal as mentioned above, includes for example use of a previously prepared table. Namely, phase errors previously calculated from {tan
−1
&thgr;} is set in a table addressed with the inphase signal and the quadrature signal, and the table thus completed is stored in an information storing medium such as a ROM (read only memory).
However, this requires a large storage capacity for the information storing medium, and therefore, the error detecting device becomes too large. In order to solve this problem, it may be considered to calculate, in real time, the phase difference or phase error from the inphase signal and the quadrature signal without using the above mentioned table.
The device for executing this calculation is disclosed in for example “Fundamentals and Applications of Digital PLL”, (Japanese language book) page 93, Trikeppuse EX11. This book shows a simple circuit for approximately calculating the phase error from the inphase signal and the quadrature signal, and therefore, if this circuit is used, it is possible to remarkably reduce the circuit scale of the error detecting device.
In addition, at present, it is considered to utilize the PSK modulated signal a digital broadcasting in order to transmit a high quality image data. In this consideration, it is also considered to sequentially transmit in a time sharing manner, a plurality of kinds of PSK modulated signals having different modulation phase numbers, as shown in FIG.
10
.
For example, when modulated signals of two phases to 8 phases (binary phase shift keying (BPSK), quadrature phase shift keying (QPSK), and octal phase shift keying (OPSK or 8PSK)) are transmitted in a time division as shown in
FIG. 10
, if the image data is transmitted by the modulated signals of QPSK and 8PSK, a signal demodulating device can reproduce a high quality image data from the modulated signals of 8PSK if a communication condition is good, and also can reproduce a low quality image data from the modulated signals of QPSK if the communication condition is bad. Furthermore, it is also considered to make the timing division ratio of the QPSK modulated signal and the 8PSK modulated signal variable, and to transmit the timing division ratio by the BPSK modulated signal.
If the above mentioned digital broadcasting is realized, since the As signal demodulating device is necessarily required to demodulate the plurality of Ends of PSK modulated signals having different modulation phase numbers, the error detecting device is also required to detect the phase error in the plurality of kinds of PSK modulated signals. For example, since the circuit disclosed by the above referred book for detecting the phase error is different between the binary phase and the quadrature phase, if the phase error device capable of complying with both the binary phase and the quadrature phase is constructed by using the circuit disclosed by the above referred book, it is sufficient if a circuit for the binary phase and anther circuit the quadrature phase are constructed separately from each other, and are connected in parallel to a selector circuit.
As mentioned above, if the phase error detecting circuits are provided for different phase numbers, respectively and are connected in parallel to the selector circuit, it is possible to detect the phase error of the plurality of kinds of modulated signals having different modulation phase numbers. However, in the circuit disclosed by the above referred book, since a phase error calculating method is different from the binary phase to the quadrature phase, a phase error detecting sensitivity becomes different from the binary phase to the quadrature phase.
In detail, in the circuit disclosed by the above referred book, since the reference phase of the binary phase is positioned on the axis of ordinates in the complex plane, the phase error is approximately calculated by multiplying a quadrature signal Q by a positive
egative sign of an inphase signal I. In the quadrature phase, since the reference phase is positioned at an angle of 45° to the axis of ordinates and the axis of abscissas in the complex plane, the phase error is approximately calculated by subtracting the value obtained by multiplying the quadrature signal Q by a positive
egative sign of the inphase signal I, from the value obtained by multiplying the inphase signal I by a positive
egative sign of the quadrature signal Q.
For example, it is possible to position the reference positions of the quadrature phase on the axis of the complex plane and to make the detection sensitivity of the phase error to comply with the binary phase. However, if the modulation phase number of the modulated signal is changed in the time division, a plurality of reference position patterns appear in the modulated signal having a small modulation phase number.
For example, when the modulation phase number changes from the quadrature phase to the binary phase as mentioned above, even if the reference positions of the quadrature phase are positioned in the complex plane as shown in
FIG. 12A
, the reference positions of tie binary phase can assume two different conditions, in one of which the reference positions are positioned on the axis of abscissas in the complex plane as shown in
FIG. 12A
, and in the other of which the reference positions are positioned on the axis of ordinates in the complex plane as shown in FIG.
12
C. In these two conditions, the phase error detecting method is different from each other, and therefore, the one phase difference detecting circuit as mentioned above for the binary phase can no longer comply with.
When the modulation phase number is caused to change from the binary phase to the octal phase as mentioned above, the reference position patterns of the quadrature phase in the complex phase becomes two as shown in
FIGS. 11A and 11B
, and the reference position patterns of the binary phase in the complex phase becomes four as shown in
FIGS. 12A
,
12
B,
12
C and
12
D. Therefore, it becomes difficult to detect the phase error with an appropriate sensitivity.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an error detecting method and device for detecting a
De'cady Albert
Lamarre Guy
McGinn & Gibb PLLC
NEC Corporation
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