Error detecting circuit of a system time clock for an MPEG syste

Details Error detecting circuit of a system time clock for an MPEG syste Error detecting circuit of a system time clock for an MPEG syste

1996-10-22

1999-03-09

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

375376, 375359, 375368, 370253, H03D 324

Patent

active

058811141

ABSTRACT:
An error detecting circuit of a system time clock is described, which includes a counter section for counting the pulses of the system time clock and resetting the count value at every given period, an error generating section for generating an error value, a loop filter for outputting a voltage value in accordance with the error value, and a voltage controlled oscillator for providing a clock signal corresponding to the voltage value from the loop filter. The frequency of a system time clock of a decoder is modified in accordance with the difference of the system time clock of the decoder from that of an encoder, thereby synchronizing the system time clocks of the decoder and the encoder.

REFERENCES:
patent: 5467342 (1995-11-01), Logston et al.
patent: 5598352 (1997-01-01), Rosenan et al.
patent: 5623311 (1997-04-01), Phillips et al.
patent: 5699392 (1997-12-01), Dokic

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