Excavating
Patent
1991-12-20
1995-03-07
Beausoliel, Jr., Robert W.
Excavating
371 381, 371 391, G06F 1110, H03M 1300
Patent
active
053965043
ABSTRACT:
An error correction system of digital data for use in a digital VTR or a digital TV constituted as parts of a digital processing system, which is provided with an ECC outer encoder, a shuffling means, an inner encoder, a tape, an ECC inner decoder, a de-shuffling means and an ECC outer decoder to perform the double encoding/decoding, comprises a memory address generating circuit for enabling the de-shuffling portion to generate addresses increasing toward the column from the first address of write addresses, a de-shuffling memory circuit for storing data and error flags and a path control circuit for controlling the input/output of data and error flag memories. Thus, it makes use of an ID signal identifying the position information of data recorded on a tape and an error flag confirming whether the reproduced data is error or not, so that it controls the write addresses and input/output paths of the data and error flag memories to minimize the loss of recorded data, thereby improving the quality of the image to be reproduced.
REFERENCES:
patent: 4357702 (1982-11-01), Chase et al.
patent: 4653052 (1987-03-01), Doi et al.
patent: 4742519 (1988-05-01), Abe et al.
patent: 4882732 (1989-11-01), Kaminaga
patent: 5038350 (1991-08-01), Mester
patent: 5070503 (1991-12-01), Shikakura
patent: 5161171 (1992-11-01), Suzuki et al.
Beausoliel, Jr. Robert W.
Le Dieu-Minh
Samsung Electronics Co,. Ltd.
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