Error character generation

Details Error character generation Error character generation

1999-12-15

2002-08-20

Ton, David (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S808000

Reexamination Certificate

active

06438728

ABSTRACT:

FIELD
The present invention pertains to an error generating circuit and method, for generating a 10-bit error character to test 8-bit/10-bit decoders.
BACKGROUND
Communication networks often utilize 8-bit/10-bit (“8B/10B”) encoders and decoders to improve reliability. An 8B/10B encoder encodes received eight bit bytes of binary data into ten bit bytes plus a disparity bit which indicates whether there is a difference between the number of ones and the number of zeros in the ten bit byte. Conversely, an 8B/10B decoder converts ten bit bytes of binary data into eight bit bytes plus a disparity bit. 8B/10B encoders and decoders are described, for example, in the U.S. Pat. No. 4,486,739 and in an article “A DC/Balanced, Partitioned-Block, 8B/10B Transmission Code,” by A. X. Widmer and T. A. Franaszek, IBM Journal of Research and Development, Volume 25, No. 5 (September 1983), pages 440-451.
A typical 8B/10B encoder receives eight bit bytes of binary input data and an input disparity bit, encodes the eight bit bytes to ten bit data in accordance with the input disparity bit, and calculates the disparity of the ten bit byte to provide an output disparity bit that determines how to encode the next eight bit input byte. The output disparity bit indicates whether the ten bit byte has more ones than zeros (positive disparity), more zeros than ones (negative disparity), or an equal number of ones and zeros (neutral disparity). Similarly, a typical 8B/10B decoder receives ten bit bytes of data and an input disparity bit, decodes the ten bit bytes to eight bit bytes in accordance with the input disparity bit, and calculates the disparity of the ten bit input byte to provide an output disparity bit that determines how to decode the next ten bit input byte. 8B/10B encoders and decoders are standard protocol on many serial communication networks. 8B/10B decoders must be capable of detecting error characters in the event a transmission error or an error in encoding or decoding occurs. Thus, it is desirable to be able to test 8B/10B decoders to assure that they properly recognize error characters. Two types of error character might occur. With each successive byte of data to be decoded, the disparity should either change or remain neutral. Thus, for example, if one byte has positive disparity, the next byte must have either negative or neutral disparity. The first type of error character is an invalid 8B/10B character which has correct disparity. This is a character which is not allowed in the 8B/10B character alphabet. The second type of error which can be generated is a valid 8B/10B character that is unacceptable due to a disparity error. It is desirable to be able to generate error characters of both types in order to test 8B/10B decoders. In addition, such error characters can be utilized when checking the design of a new 8B/10B decoder, for example, in a “debugging” process.
SUMMARY
The present invention is an error generating circuit and method for generating a 10-bit error character to test 8B/10B decoders. In the circuit and method, a character generator receives a two-state mode control signal and a two-state disparity control signal and generates a 10-bit error character of a type dependent upon the states of the disparity control signal and the mode control signal. That is, when the disparity control signal is in its first state and the mode control signal is in its first state, the character generator generates a 10-bit error character of a first type; when the disparity control signal is in its second state and the mode control signal is in its first state, the character generator generates a 10-bit error character of a second type; when the disparity control signal is in its first state and the mode control signal is in its second state, the character generator generates a 10-bit error character of a third type, and when the disparity control signal is in its second state and the mode control signal is in its second state, the character generator generates a 10-bit error character of a fourth type. The four types of error characters that can be generated are an invalid 10-bit character having positive disparity, an invalid 10-bit character having negative disparity, a valid 10-bit character having positive disparity, and a valid 10-bit character having negative disparity.


REFERENCES:
patent: 4486739 (1984-12-01), Franaszek et al.
patent: 4573034 (1986-02-01), Immink
patent: 4975916 (1990-12-01), Miracle et al.
patent: 5130990 (1992-07-01), Hsu et al.
patent: 5699062 (1997-12-01), Widmer
patent: 5802080 (1998-09-01), Westby
A. Widmer et al., “A DC-Balanced, Partitioned-Block, 8B/10B Transmission Code”,IBM J. Res. Develop.,vol. 27, No. 5, Sep. 1983, pp. 441-451.

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