Erase discharge control method of nonvolatile semiconductor...

Details Erase discharge control method of nonvolatile semiconductor... Erase discharge control method of nonvolatile semiconductor...

2007-06-26

2010-06-15

Phan, Trong (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185250, C365S185260, C365S185270, C365S185290, C365S185330

Reexamination Certificate

active

07738299

ABSTRACT:
According to an example embodiment, an erase discharge method may include drawing charges accumulated in a floating gate of a floating gate type field effect transistor into a semiconductor substrate to perform an erase operation by applying a first voltage to a word line, a second voltage to an N-well and a P-well, and/or opening a bit line and a ground line. The word line may be grounded, and a discharge transistor connected to the bit line may be turned on. The N-well and the P-well may be grounded to discharge charges accumulated in the N-well and P-well.

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