Erasable FPLA

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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Details

365104, G11C 1300

Patent

active

046176497

ABSTRACT:
An erasable field programmable logic array including a matrix of reprogrammable memory elements which may be selectively programmed to store a desired logic function therein is provided. Since use is made of reprogrammable memory elements, the stored logic function may be erased and another logic function may be programmed into the programmable logic array.

REFERENCES:
patent: 4124899 (1978-11-01), Birkner
patent: 4276616 (1981-07-01), Hennig
patent: 4503520 (1985-05-01), Kyoynasu et al.

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