Equalization techniques using viterbi algorithms in...

Details Equalization techniques using viterbi algorithms in... Equalization techniques using viterbi algorithms in...

2007-02-23

2011-11-29

Alphonse, Fritz (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S786000, C714S778000

Reexamination Certificate

active

08069401

ABSTRACT:
A system and method for channel equalization using a Viterbi algorithm. Information from an output of a matched filter and channel parameters from a channel estimation circuit are correlated and passed on to a reconfigurable data path. The reconfigurable data path includes a reconfigurable branch metric calculation block. The reconfigurable data path also includes a reconfigurable add-compare-select and path metric calculation block. The reconfigurable data path is controlled using a programmable finite state machine. The programmable finite state machine executes a plurality of context-related instructions associated with the Viterbi algorithm. The system and method for channel equalization supports multiple standards using Viterbi algorithms.

REFERENCES:
patent: 6311200 (2001-10-01), Hanrahan et al.
patent: 7117426 (2006-10-01), Wu et al.
patent: 7159109 (2007-01-01), Egevang
patent: 2002/0095639 (2002-07-01), Ahmed et al.
patent: 2004/0243908 (2004-12-01), Box et al.
patent: 2005/0034051 (2005-02-01), Chun et al.

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