Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2002-08-22
2004-12-07
Lebentritt, Michael (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S503000, C438S689000
Reexamination Certificate
active
06828182
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to manufacturing methods of semiconductor devices, and more particularly to a method for selectively forming an epitaxial thin film on a semiconductor substrate.
2. Description of the Background Art
It is widely known that, when the surface of a semiconductor substrate of silicon or the like is partly provided with an insulating film, such as oxide film, or nitride film and partly exposed, an epitaxial thin film can be selectively formed exclusively on the exposed portion. A structure called an elevated source drain takes advantage of this technique to form an active region in the selectively grown epitaxial thin film. In recent years, with advancement of downsizing of semiconductor elements, conventional manufacturing methods have found difficulties in controlling threshold values critical to electric performance. This elevated source drain structure enables implementation of a transistor overcoming this problem.
When forming the epitaxial thin film selectively on the semiconductor substrate, however, a facet may be formed at the edge of the epitaxial thin film where it contacts the insulating film. Such a facet hinders formation of an active region of a predetermined depth, thereby adversely affecting delicate operations of the transistor. In addition, when the facet reaches the semiconductor substrate, a conductive layer formed on the epitaxial thin film will come into contact with the semiconductor substrate, causing a local leakage current.
Hereinafter, description is made as to why the facet is created. An oxide film having an opening is formed on a silicon substrate with a surface of (
100
) crystallographic plane, and an epitaxial thin film is formed of silicon to fill in the opening. According to the epitaxial growth method, it is possible to form an epitaxial thin film with the same orientation as the (
100
) plane of the silicon substrate. However, at a portion where the epitaxial thin film comes into contact with a sidewall of the oxide film, silicon atoms within the epitaxial thin film become disadvantageous in terms of surface free energy. To eliminate such disadvantage of the surface free energy, the epitaxial thin film produces a facet at the interface with the sidewall of the oxide film in an attempt to avoid contact with the oxide film.
A thermodynamic effect acting to minimize the surface free energy takes an important role in such facet formation. As a result, a (
311
) plane having a surface free energy smaller than that of the (
100
) plane of the epitaxial thin film to be formed is created as the facet at the edge of the epitaxial thin film where it contacts the oxide film.
In order to solve such a problem, Japanese Patent No. 2638261, for example, discloses a method for forming an epitaxial thin film of silicon using a gas source. According to the publication, at least one of the growth temperature and the partial pressure of the source gas is changed within a range of 400° C. to 800° C. and within a range where the degree of vacuum is from 1.3×10
−3
Pa to 1.3×10
−1
Pa, respectively. More specifically, the growth temperature is lowered or the flow rate of the gas material is increased within the aforementioned ranges such that the epitaxial thin film is selectively formed while creation of a facet is restrained.
When the epitaxial thin film is formed under the above-described conditions with the growth temperature decreased and the gas flow rate increased, the facet will be gradually reduced in size and will disappear under a prescribed condition. However, if the growth temperature is lowered and the gas flow rate is increased and exceeds a certain range, a bump will occur instead of the facet. The bump has a rounded shape and is formed at the surface of the epitaxial thin film near the sidewall of the oxide film. A large bump hinders formation of an active region of a predetermined depth, thereby adversely affecting the delicate operations of the transistor.
As such, in order to form a flat epitaxial thin film, it is necessary to control both the growth temperature and the gas flow rate to fall into prescribed ranges. With the conventional techniques, however, specific ranges of the growth temperature and the flow rate of the gas material ensuring formation of a flat epitaxial thin film were unclear.
SUMMARY OF THE INVENTION
Based on the foregoing, an object of the present invention is to provide a method for selectively forming a flat epitaxial thin film by controlling a growth temperature and a flow rate of a gas material.
The epitaxial thin film forming method according to the present invention controls the flow rate of the gas material supplied to a deposition atmosphere to selectively form the epitaxial thin film on a semiconductor substrate. The method includes the step of determining a relation between the growth rate of the epitaxial thin film and the flow rate of the gas material by changing the flow rate of the gas material supplied to the deposition atmosphere under a prescribed temperature condition. This step of determining the relation between the growth rate of the epitaxial thin film and the flow rate of the gas material includes the step of determining a mass transfer limited region where the growth rate of the epitaxial thin film is approximately proportional to the flow rate of the gas material, a kinetically limited region where the growth rate of the epitaxial thin film is approximately constant, and an intermediate region located between the mass transfer limited region and the kinetically limited region. The epitaxial thin film forming method further includes the step of forming the epitaxial thin film on the semiconductor substrate by supplying the gas material at the flow rate corresponding to the intermediate region.
According to the epitaxial thin film forming method as configured above, in the step of determining the relation between the growth rate of the epitaxial thin film and the flow rate of the gas material, it is possible to obtain the growth temperatures at the times when the relations between the growth rate and the flow rate of the gas material fall into the mass transfer limited region, the intermediate region and the kinetically limited region within the range of the gas flow rates changed. In addition, it is possible to obtain the flow rate at the time when the relation between the growth rate of the epitaxial thin film and the flow rate of the gas material falls into the intermediate region at the growth temperature obtained.
In the step of forming the epitaxial thin film on the semiconductor substrate, the deposition atmosphere is controlled to have the flow rate of the gas material and the growth temperature as described above. This enables formation of a flat epitaxial thin film, and accordingly, a transistor of high performance adapted to downsizing of semiconductor elements is realized.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
REFERENCES:
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patent: 6703290 (2004-03-01), Boydston et al.
patent: 6724019 (2004-04-01), Oda et al.
patent: 2003/0109095 (2003-06-01), Boydston et al.
patent: 2004/0137732 (2004-07-01), Frayssinet et al.
patent: 4-74415 (1992-03-01), None
patent: 4-074415 (1992-03-01), None
Nakahata, Takumi et al., “Formation of Selective Epitaxially Grown Silicon with a Flat Edge by Ultra-high Vacuum Chemical Vapor Deposition”, Journal of Crystal Growth 233 (2001), pp. 82-87, Sep. 4, 2001.
Lebentritt Michael
Leydig , Voit & Mayer, Ltd.
Mitsubishi Denki & Kabushiki Kaisha
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