Enhanced thermal dissipation integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S713000, C257S717000, C257S720000, C257S796000, C361S688000, C361S704000, C361S707000, C361S709000, C361S710000

Reexamination Certificate

active

06734552

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to integrated circuit packaging and manufacturing thereof, and more particularly, to integrated circuit packaging for enhanced dissipation of thermal energy.
BACKGROUND OF THE INVENTION
A semiconductor device generates a great deal of heat during normal operation. As the speed of semiconductors has increased, so too has the amount of heat generated by them. It is desirable to dissipate this heat from an integrated circuit package in an efficient manner.
A heat sink is one type of device used to help dissipate heat from some integrated circuit packages. Various shapes and sizes of heat sink devices have been incorporated onto, into or around integrated circuit packages for improving heat dissipation from the particular integrated circuit package. For example, U.S. Pat. No. 5,596,231 to Combs, entitled “High Power Dissipation Plastic Encapsulated Package For Integrated Circuit Die,” discloses a selectively coated heat sink attached directly on to the integrated circuit die and to a lead frame for external electrical connections.
SUMMARY OF THE INVENTION
In one aspect, the invention features an integrated circuit package with a semiconductor die electrically connected to a substrate, a heat sink having a portion thereof exposed to the surroundings of the package, a thermally conductive element thermally coupled with and interposed between both the semiconductor die and the heat sink, wherein the thermally conductive element does not directly contact the semiconductor die, and an encapsulant material encapsulating the thermally conductive element and the heat sink such that a portion of the heat sink is exposed to the surroundings of the package.
In another aspect, the invention features an integrated circuit package with a semiconductor die electrically connected to a substrate, a heat sink having a portion thereof exposed to the surroundings of the package, means for thermally coupling the semiconductor die with the heat sink to dissipate heat from the semiconductor die to the surroundings of the package, wherein the means for thermally coupling is interposed between the semiconductor die and the heat sink but does not directly contact the semiconductor die, and means for encapsulating the thermally conductive element and the heat sink such that a portion of the heat sink is exposed to the surroundings of the package.
In yet another aspect, the invention features an integrated circuit package with a substrate having an upper face with an electrically conductive trace formed thereon and a lower face with a plurality of solder balls electrically connected thereto, wherein the trace and at least one of the plurality of solder balls are electrically connected, a semiconductor die mounted on the upper face of the substrate, wherein the semiconductor die is electrically connected to the trace, a heat sink having a top portion and a plurality of side portions, a thermally conductive element thermally coupled to but not in direct contact with the semiconductor die, wherein the thermally conductive element is substantially shaped as a right rectangular solid, is interposed between said semiconductor die and said heat sink, and is attached to said heat sink, and an encapsulant material formed to encapsulate the upper face of the substrate, the semiconductor die, the thermally conductive element and substantially all of the heat sink except the top portion and the side portions of the heat sink.
In a further aspect, the invention features an integrated circuit package with a substrate having means for electrically interconnecting a semiconductor die and means for exchanging electrical signals with an outside device, a semiconductor die attached and electrically connected to the substrate by attachment means, a heat sink having means for dissipating thermal energy to the surroundings of the package, means for thermally coupling the semiconductor die to the heat sink to dissipate heat from said semiconductor die to the surroundings of said package, wherein said means for thermally coupling is interposed between said semiconductor die and said heat sink but does not directly contact the semiconductor die, and means for encapsulating said semiconductor die, said thermally conductive element and said heat sink such that said portion of said heat sink is exposed to the surroundings of said package but is substantially encapsulated.
In another aspect, the invention features a method of manufacturing an integrated circuit package including installing a carrier onto an upper surface of a substrate, wherein the carrier defines a cavity, attaching a semiconductor die to the upper surface of the substrate within the cavity of the carrier, aligning an assembly over the semiconductor die, wherein the assembly comprises a heat sink and a thermally conductive element, resting the assembly on the carrier such that the thermally conductive element does not directly contact the semiconductor die, and encapsulating the cavity to form a prepackage such that a portion of the heat sink is exposed to the surroundings of the package.
In yet another aspect, the invention features a method of manufacturing an integrated circuit package including installing a carrier onto a substrate, attaching a semiconductor die to the substrate, aligning an assembly over the semiconductor die, wherein the assembly has a heat sink and a thermally conductive element, resting the assembly on the carrier such that the thermally conductive element does not directly contact the semiconductor die, and encapsulating the thermally conductive element and the heat sink such that a portion of the heat sink is exposed to the surroundings of the package.


REFERENCES:
patent: 3908075 (1975-09-01), Jackson et al.
patent: 3942245 (1976-03-01), Jackson et al.
patent: 4501960 (1985-02-01), Jouvet et al.
patent: 4674175 (1987-06-01), Stampfli
patent: 4701781 (1987-10-01), Sankhagowit
patent: 4975765 (1990-12-01), Ackermann et al.
patent: 5023202 (1991-06-01), Long et al.
patent: 5041395 (1991-08-01), Steffen
patent: 5122860 (1992-06-01), Kikuchi et al.
patent: 5157475 (1992-10-01), Yamaguchi
patent: 5172213 (1992-12-01), Zimmerman
patent: 5175612 (1992-12-01), Long et al.
patent: 5285105 (1994-02-01), Cain
patent: 5334857 (1994-08-01), Mennitt et al.
patent: 5366933 (1994-11-01), Golwalkar et al.
patent: 5420460 (1995-05-01), Massingill
patent: 5474957 (1995-12-01), Urushima
patent: 5482736 (1996-01-01), Glenn et al.
patent: 5482898 (1996-01-01), Marrs
patent: 5485037 (1996-01-01), Marrs
patent: 5556807 (1996-09-01), Bhattacharyya et al.
patent: 5596231 (1997-01-01), Combs
patent: 5596485 (1997-01-01), Glenn et al.
patent: 5620928 (1997-04-01), Lee et al.
patent: 5650593 (1997-07-01), McMillan et al.
patent: 5672548 (1997-09-01), Culnane et al.
patent: 5672909 (1997-09-01), Glenn et al.
patent: 5679978 (1997-10-01), Kawahara et al.
patent: 5693572 (1997-12-01), Bond et al.
patent: 5708567 (1998-01-01), Shim et al.
patent: 5729432 (1998-03-01), Shim et al.
patent: 5736785 (1998-04-01), Chiang et al.
patent: 5789813 (1998-08-01), Kirkland et al.
patent: 5796163 (1998-08-01), Glenn et al.
patent: 5807768 (1998-09-01), Shin
patent: 5854511 (1998-12-01), Shin et al.
patent: 5867368 (1999-02-01), Glenn
patent: 5874321 (1999-02-01), Templeton, Jr. et al.
patent: 5886397 (1999-03-01), Ewer
patent: 5894108 (1999-04-01), Mostafazadeh et al.
patent: 5900676 (1999-05-01), Kweon et al.
patent: 5939784 (1999-08-01), Glenn
patent: 5940271 (1999-08-01), Mertol
patent: 5949655 (1999-09-01), Glenn
patent: 5950074 (1999-09-01), Glenn et al.
patent: 5962810 (1999-10-01), Glenn
patent: 5981314 (1999-11-01), Glenn et al.
patent: 5982621 (1999-11-01), Li
patent: 5986336 (1999-11-01), Tomita
patent: 5986340 (1999-11-01), Mostafazadeh et al.
patent: 6011304 (2000-01-01), Mertol
patent: 6028354 (2000-02-01), Hoffmann
patent: 6034429 (2000-03-01), Glenn et al.
patent: 6049125 (2000-04-01), Brooks et al.
patent: 6069023 (2000-05-01), Bernier et al.
patent: 6081028 (2000-06-01), Ettehadieh et al.
patent: 6081029 (2000-06-01)

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Enhanced thermal dissipation integrated circuit package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Enhanced thermal dissipation integrated circuit package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Enhanced thermal dissipation integrated circuit package will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3241168

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.