Enhanced multi-bit non-volatile memory device with resonant...

Details Enhanced multi-bit non-volatile memory device with resonant... Enhanced multi-bit non-volatile memory device with resonant...

2011-01-11

2011-01-11

Tran, Minh-Loan T (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S591000, C257S321000, C257S325000, C257SE29304, C257SE29309

Reexamination Certificate

active

07867850

ABSTRACT:
A non-volatile memory cell uses a resonant tunnel barrier that has an amorphous silicon and/or amorphous germanium layer between two layers of either HfSiON or LaAlO3. A charge trapping layer is formed over the tunnel barrier. A high-k charge blocking layer is formed over the charge trapping layer. A control gate is formed over the charge blocking layer. Another embodiment forms a floating gate over the tunnel barrier that is comprised of two oxide layers with an amorphous layer of silicon and/or germanium between the oxide layers.

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