Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2005-01-04
2005-01-04
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S039000
Reexamination Certificate
active
06838904
ABSTRACT:
Structures and techniques are provided for allowing one or more of the following actions to occur within a Complex Programmable Logic Device (CPLD): (1) Elective use of a fast, allocator-bypassing path (e.g., a fast 5-PT path) in combination with in-block simple or super-allocation; (2) Elective use of an OSM-bypassing path for signals that do not need pin-consistency; (3) Automatic re-routing of output enable signals that corresponding to output signals which are re-routed for pin-consistency purposes; (4) Global distribution of globally-usable output enable signals; (5) Elective use of two-stage steering to develop complex sum-of-clusters terms where fast path or simple allocation will not be sufficient; and (6) Use of unidirectional super-allocation with stage-2 wrap-around in designs having about 24 or less macrocell units per logic block. Techniques are provided for concentrating the development of complex function signals (e.g., ≦80PTs) within singular logic blocks so that the development of such complex function signals does not consume inter-block interconnect resources. One CPLD configuring method includes the machine-implemented steps of first identifying middle-complexity functions that are achievable by combined simple or super-allocation based development in one logic block and fast-path completion in the same or a second logic block; and configuring the CPLD to realize one or more of the functions identified in the first identification step by simple or super-allocation based development in one logic block and fast-path completion in the same or a second logic block.
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Internet page www.latticesemi.com/products/cpld/4000bc/index.cfm: ispMACH 4000B/C, Lattice Semiconductor Corporation, Mar. 4, 2002, pp. 1-4.
Data Sheet: ispMACH™ 4000B/C Family, Lattice Semiconductor Corporation, Dec. 2001, pp. 1-24.
Agrawal Om P.
Bosco Gilles M.
Fontana Fabiano
Lattice Semiconductor Corporation
Tan Vibol
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