End of range (EOR) secondary defect engineering using...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S344000, C257S398000, C257S400000, C257S408000

Reexamination Certificate

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11462846

ABSTRACT:
A method for incorporating carbon into a wafer at the interstitial a-c silicon interface of the halo doping profile is achieved. A bulk silicon substrate is provided. A carbon-doped silicon layer is deposited on the bulk silicon substrate. An epitaxial silicon layer is grown overlying the carbon-doped silicon layer to provide a starting wafer for the integrated circuit device fabrication. An integrated circuit device is fabricated on the starting wafer by the following steps. A gate electrode is formed on the starting wafer. LDD and source and drain regions are implanted in the starting wafer adjacent to the gate electrode. Indium is implanted to form halo implants adjacent to the LDD regions and underlying the gate electrode wherein the halo implants extend to an interface between the epitaxial silicon layer and the carbon-doped silicon layer wherein carbon ions in the carbon-doped silicon layer act as a silicon interstitial sink for silicon interstitials formed by the halo implants to prevent end of range secondary defect formation.

REFERENCES:
patent: 4636822 (1987-01-01), Codella et al.
patent: 6333217 (2001-12-01), Umimoto et al.
patent: 6774436 (2004-08-01), Yu et al.

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