Emitter-coupled logic to CMOS logic converter and method of oper

Details Emitter-coupled logic to CMOS logic converter and method of oper Emitter-coupled logic to CMOS logic converter and method of oper

1997-11-19

1999-12-28

Tokar, Michael

Electronic digital logic circuitry

Interface

Logic level shifting

326 73, 326 77, 326 84, H03K 190175

Patent

active

06008667&

ABSTRACT:
An emitter-coupled logic to CMOS logic converter includes a first current mirror having a first transistor that has a terminal. The first current mirror is operable to mirror a current in the terminal of the first transistor to produce a mirrored first current. The converter also includes a first current sink operable to generate a first current in the terminal of the first transistor. The converter also includes a second current mirror having a second transistor that has a terminal. The second current mirror is operable to mirror a current in the terminal of the second transistor to produce a mirrored second current. The converter further includes a second current sink operable to generate a second current in the terminal of the second transistor and a differential input pair operable to receive a differential voltage input and direct a current, based on the differential voltage input, to the terminal of the first transistor or the terminal of the second transistor. In addition, the converter includes a third current mirror for mirroring the first mirrored current and the second mirrored current to produce an output voltage that varies in response to changes in the differential voltage input.

REFERENCES:
patent: 4779016 (1988-10-01), Sugiyama et al.
patent: 5059829 (1991-10-01), Flannagan et al.
Martin Rau and Hans-Jorg Pfleiderer, "An ECL to CMOS Level Converter with Complementary Bipolar Output Stage," IEEE Journal of Solid-State Circuits, pp. 781-787, Jul. 1995.

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