Embedded silicon-controlled rectifier (SCR) for HVPMOS ESD...

Details Embedded silicon-controlled rectifier (SCR) for HVPMOS ESD... Embedded silicon-controlled rectifier (SCR) for HVPMOS ESD...

2005-08-09

2008-05-13

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Device protection

C257S336000, C257S255000

Reexamination Certificate

active

07372083

ABSTRACT:
A high voltage p-type metal oxide semiconductor (HVPMOS) device having electrostatic discharge (ESD) protection functions and a method of forming the same are provided. The HVPMOS includes a PMOS transistor, wherein the PMOS transistor comprises a first source/drain region doped with a p-type impurity in a high voltage p-well (HVPW) region, a second source/drain region doped with a p-type impurity in a high voltage n-well (HVNW) region wherein the HVPW region and HVNW region physically contact each other, a field region substantially underlying a gate dielectric, and a first heavily doped n-type (N+) region in the HVPW region and contacting the first source/drain region. The device further includes an N+ buried layer underlying the HVPW region and the HVNW region and a p-type substrate underlying the N+ buried layer. The device has robust performance for both forward and reverse mode ESD.

REFERENCES:
patent: 5872379 (1999-02-01), Lee
patent: 6066879 (2000-05-01), Lee et al.
patent: 6268992 (2001-07-01), Lee et al.
patent: 6459127 (2002-10-01), Lee et al.
Lin et al, EOSESD Symposium, 2004, pp. 265-271.
Lin K.-H., et al., “Design on Latchuo-Free Power-Rail ESD Clamp Circuit in High-Voltage CMOS ICs,” EOS/ESD Symposium, 2004, pp. 265-271.

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