Embedded NV memory and method of manufacturing the same

Details Embedded NV memory and method of manufacturing the same Embedded NV memory and method of manufacturing the same

2007-08-31

2009-12-01

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S315000, C257SE21680, C438S264000

Reexamination Certificate

active

07625797

ABSTRACT:
Disclosed in a non-volatile (NV) memory device and a method of manufacturing the same. The method includes forming transistor and EEPROM regions by implanting first and second conductive impurity ions into a semiconductor substrate, depositing a gate oxide on an entire surface of the semiconductor substrate, forming a first gate poly on the EEPROM region, removing the gate oxide not below the first gate poly, forming a logic gate oxide, a tunnel oxide and a coupling oxide, forming a logic gate poly on the transistor region and a second gate poly on a sidewall of the first gate poly, forming source/drain extension regions by implanting first and second conductive impurity ions, forming a sidewall spacer on the logic gate poly and the second gate poly, and forming a silicide on the source, drain and logic gate poly of the transistor region.

REFERENCES:
patent: 5861347 (1999-01-01), Maiti et al.
patent: 7366026 (2008-04-01), Lee
patent: 2001/0052611 (2001-12-01), Kim
patent: 2004/0119112 (2004-06-01), Lojek

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