Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-11-15
2002-01-15
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S303000
Reexamination Certificate
active
06338998
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods for fabricating embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications. More particularly, the present invention related to methods for fabricating, with enhanced performance, embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications.
2. Description of the Related Art
Common in the art of semiconductor integrated circuit microelectronic fabrication is the use of embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications that simultaneously incorporate logic semiconductor integrated circuit microelectronic fabrication devices (typically including, but not limited to, field effect transistor (FET) logic semiconductor integrated circuit microelectronic fabrication devices) and dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication devices (typically including, but not limited to, field effect transistor (FET) memory semiconductor integrated circuit microelectronic fabrication devices in conjunction with storage capacitor memory semiconductor integrated circuit microelectronic fabrication devices).
Embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications are particularly useful within semiconductor integrated circuit microelectronic fabrication applications that require both the storage and the timely manipulation of comparatively large quantities of digital data. Such applications often include, but not limited to, digital computer graphics applications.
While embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications are thus desirable in the art of semiconductor integrated circuit microelectronic fabrication and often essential in the art of semiconductor integrated circuit microelectronic fabrication, embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications are nonetheless not entirely without problems in the art of semiconductor integrated circuit microelectronic fabrication.
In that regard, it is known in the art of semiconductor integrated circuit microelectronic fabrication that embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications are often difficult to efficiently fabricate with enhanced performance, insofar as the performance characteristics of logic semiconductor integrated circuit microelectronic fabrication devices within embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications are affected by different semiconductor integrated circuit microelectronic fabrication processing considerations in comparison with the performance characteristics of memory semiconductor integrated circuit microelectronic fabrication devices within embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications.
It is thus desirable in the art of embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication to provide methods and materials that in turn provide embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications with enhanced performance.
It is towards the foregoing object that the present invention is directed.
Various embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications having desirable properties, and methods for fabrication thereof, have been disclosed within the art of semiconductor integrated circuit microelectronic fabrication.
For example, Sung, in U.S. Pat. No. 5,858,831, discloses a method for forming, with both enhanced performance and enhanced manufacturing economy, an embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication. To realize the foregoing object, the method employs only a single additional photolithographic masking step for forming, in part, within the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication a field effect transistor (FET) logic semiconductor integrated circuit microelectronic fabrication device having formed therein a comparatively thinner gate dielectric layer in comparison with a gate dielectric layer formed within a field effect transistor (FET) memory semiconductor integrated circuit microelectronic fabrication device within the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication.
In addition, Wu et al., in U.S. Pat. No. 5,998,251, similarly also discloses a method for forming, with both enhanced performance and enhanced manufacturing economy, an embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication. To realize the foregoing object, the method provides for forming in part simultaneously within the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication a conductor interconnect layer within a logic device region within the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication and a storage capacitor within a memory device region within the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication.
Finally, Liao, in U.S. Pat. No. 6,069,037, similarly yet also discloses a method for forming, with both enhanced performance and with enhanced manufacturing economy, an embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication. To realize the foregoing object, the method comprises a self-aligned method which employs a pair of photoresist masking steps, only one of which requires a critical dimensional tolerance, to form within the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication a field effect transistor (FET) logic semiconductor integrated circuit microelectronic fabrication device having formed therein a comparatively thinner gate electrode in comparison with a gate electrode employed within a field effect transistor (FET) memory semiconductor integrated circuit microelectronic fabrication device within the embedded dynamic access memory (DRAM) semiconductor integrated circuit microelectronic fabrication.
Desirable in the art of semiconductor integrated circuit microelectronic fabrication are additional methods and materials that may be employed for fabricating, with enhanced performance, embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrications.
It is towards the foregoing object that the present invention is directed.
SUMMARY OF THE INVENTION
A first object of the present invention is to provide a method for fabricating an embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication.
A second object of the present invention is to provide a method in accord with the first object of the present invention, wherein the embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication is fabricated with enhanced performance.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, wherein the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided by the present invention a method for fabricating an embedded dynamic random access memory (DRAM) semiconductor integrated circuit microelectronic fabrication. To practice the method of the present invention, there is provided a semiconductor substrate. There is then formed upon a first portion of the semiconductor substrate a first gat
Chiang Kevin
Lin Chen-Yong
Wang Chen-Jong
Taiwan Semiconductor Manufacturing Company Ltd
Tsai Jey
Tung & Associates
LandOfFree
Embedded DRAM fabrication method providing enhanced embedded... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Embedded DRAM fabrication method providing enhanced embedded..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Embedded DRAM fabrication method providing enhanced embedded... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2869872