Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-03-06
2002-10-29
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S424000
Reexamination Certificate
active
06472270
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to methods of fabricating an isolation structure and an oxide film for use therein.
2. Description of the Related Art
The manufacture of integrated circuits involves connecting isolated circuit devices through specific electrical pathways. Where integrated circuits are implemented in silicon, it is necessary, therefore, to initially isolate the various circuit devices built into the silicon substrate from one another. The circuit devices are thereafter interconnected to create specific circuit configurations through the use of global interconnect or metallization layers and local interconnect layers.
Trench isolation is a heavily used isolation technique for both bipolar and metal oxide semiconductor (“MOS”) circuits. In many trench-based isolation structures, a damascene process is used to pattern and etch a plurality of trenches in the silicon substrate. The trenches are then refilled with a blanket-deposited CVD silicon dioxide or doped glass layer. To improve topography, the blanket-deposited insulating layer is planarized back to the substrate surface using etchback planarization or chemical mechanical polishing (“CMP”).
Most conventional trench isolation structures require an oxide dielectric film to line the walls of the isolation trench. Bulk deposited oxides and doped glasses can exhibit unpredictable adhesion to silicon sidewalls. A high quality thermal oxide film as precursor to bulk insulator deposition is therefore necessary to ensure complete dielectric isolation of the silicon sidewalls of the trench. In conventional processing, the trench is exposed to an oxidizing atmosphere consisting of oxygen and possibly other constituents, such as nitrogen and gaseous hydrogen chloride (“HCl”). Nitrogen serves as a carrier gas. The purpose of the HCl is twofold. First, HCl serves to reduce native oxides present on the walls of the trench. Second, HCl getters contaminant metals present in the silicon, such as sodium and iron. The sources of such contaminant metals are legion and include such things as worker perspiration and out-diffusion from processing chamber parts to name just a few. Metal gettering is also carried out by providing the substrate with interstitial oxygen. Common conventional interstitial oxygen concentrations fall within the 20 to 26 parts per million range.
For high voltage applications, the liner oxide film may be several thousand angstroms thick. Such large thicknesses require relatively high oxidation temperatures and lengthy time periods. A fallout from the high temperature and long duration oxidation processing with HCl is the potential for voids to form within the liner oxide. Void formation is thought to occur as a result of HCl outgassing from the walls of the trench into the liner oxide either during the oxidation process or during later high temperature steps. At the initial stages of the oxidation process, HCl diffuses into and becomes trapped in the sidewalls of the trench. During the later stages of the oxidation process, outgassing occurs. The liberated HCl attacks the liner oxide, producing voids at the silicon-oxide interface. The voids represent sites where electrical shorting across the trench isolation structure can occur, particularly at relatively high operating voltages.
The conventionally used oxidizing atmosphere is the primary source of chlorine. However, there may be other sources that contribute to the problem of oxide void formation. For example, chlorine may be trapped within the internal structures of thermal processing chambers. Chlorine is used to periodically clean out the interiors of semiconductor processing chambers. Quartz structures that are commonly present in these types of chambers can absorb chlorine during these cleaning processes. The trapped chlorine can outgas during later processing of wafers and contribute to void formation along with the deliberately introduced HCl.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention, a method of fabricating an oxide film is provided that includes forming a trench in a semiconductor substrate and exposing the substrate to an oxidizing atmosphere containing oxygen but substantially no chlorine. The substrate is heated to react a surface of the trench with the oxidizing atmosphere to form the oxide film thereon.
In accordance with another aspect of the present invention, a method of fabricating an isolation structure is provided that includes forming a trench in a semiconductor substrate and exposing the substrate to an oxidizing atmosphere containing oxygen but substantially no chlorine. The substrate is heated to react a surface of the trench with the oxidizing atmosphere to form an oxide film in the trench. An insulating film is formed on the oxide film that substantially fills the trench.
In accordance with another aspect of the present invention, a method of manufacturing is provided that includes heating a thermal processing chamber having internal structures to a temperature high enough to liberate chlorine trapped in the internal structures. An inert gaseous atmosphere is flowed through a thermal processing chamber to purge chlorine liberated from the internal structures. A first semiconductor workpiece is processed in the thermal processing chamber.
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Stanley Wolf and Richard N. Tauber, Silicon Processing for the VLSI Era, Lattice Press, vol. 1, Grown of Thin Oxide, pp. 209-210).*
Christopher P. D'Emic et al., Deep trench plasma etching of single crystal silicon using SF6/O2gas mixtures, Journal of Vacuum Science & Technology B, pp. 1105-1111, May/Jun. 1992.
Crawford, Jr. Franklin D.
Farahani Mohammad M.
Hartshorn Ross
Advanced Micro Devices , Inc.
Honeycutt Timothy M.
Vu David
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