Eliminating substrate noise by an electrically isolated...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S228000, C438S282000, C438S526000

Reexamination Certificate

active

06875650

ABSTRACT:
On the surface of a semiconductor material of a first conductivity type101a, a lateral MOS transistor100is described surrounded by a well171of the opposite conductivity type and, nested within the well, an electrical isolation region102. The semiconductor region101aembedding this transistor has a resistivity higher than the remainder of the semiconductor material101and further contains a buried layer160of the opposite conductivity type. This layer160extends laterally to the wells171, thereby electrically isolating the near-surface portion of the semiconductor region from the remainder of the semiconductor material, and enabling the MOS transistor to operate as an electrically isolated high-voltage I/O transistor for circuit noise reduction, while having low drain junction capacitance.In the first embodiment of the invention (FIG.1), the buried layer171extends vertically deeper from the surface than the electrical isolation region102, thereby enabling a separate contact106to the electrically isolated near-surface portion101aof the semiconductor region.

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