Elevated source/drain field effect transistor and method for...

Details Elevated source/drain field effect transistor and method for... Elevated source/drain field effect transistor and method for...

2002-05-02

2004-01-13

Elms, Richard (Department: 2824)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S301000, C257S401000

Reexamination Certificate

active

06677212

ABSTRACT:

This application is the national phase under 35 U.S.C. §371 of PCT International Application No. PCT/JP00/06046 which has an International filing date of Sep. 6, 2000, which designated the United States of America.
TECHNICAL FIELD
The present invention relates to a method for producing a semiconductor device and a semiconductor device produced by the method. More particularly, it relates to a source/drain elevated type FET (field effect transistor) capable of suppressing a short channel effect and increasing a current drive power, and a production method therefor.
BACKGROUND ART
In recent years, as the gate lengths of MOS (metal oxide semiconductor) FETs get shorter, the so-called short-channel effect represented by rapid lowering of the threshold voltage has become a problem. In order to suppress the short-channel effect, the source/drain regions have been required to have a shallower depth of junction. However, a mere reduction in the depth of the source/drain regions would increase the resistance of these regions. Therefore, a source/drain elevated type transistor wherein source/drain regions are elevated higher than a surface of the substrate has attracted attention. This structure makes it possible to provide the source/drain regions with their junctions being substantially shallow and with their electrical resistances being low.
FIG. 6
shows a process for fabricating a conventional source/drain elevated type transistor. First, as shown in FIG.
6
(
a
), a gate electrode
3
is formed on a semiconductor substrate
1
with an oxide film
2
interposed therebetween, and then a gate cap insulating film
4
is laid thereon according to a conventional process. Then, insulating sidewalls
5
are formed on side surfaces of the gate electrode
3
. A reference numeral
6
indicates an element isolation region.
Subsequently, as shown in FIG.
6
(
b
), a silicon film
7
is selectively grown between the sidewall
5
and the element isolation region
6
on the semiconductor substrate
1
, so that the silicon films
7
, which are to become source/drain regions later, are thereby elevated on the surface of the semiconductor substrate
1
. After that, as shown in FIG.
6
(
c
), a source/drain impurity is implanted into the silicon films
7
to form source/drain regions
8
. In addition, the impurity is diffused into the silicon substrate
1
by thermal treatment, thus making the source/drain regions
8
present within the semiconductor substrate
1
as well. Thereby, the source/drain elevated type transistor is formed.
However, the conventional source/drain elevated type transistor has the following drawbacks. That is, when forming the source/drain
7
on the surface of the semiconductor substrate
1
, single-crystal silicon is epitaxially grown. During the growth, facets
10
are produced at a boundary between the insulating sidewall
5
and the silicon film
7
and at a boundary between the element isolation region
6
and the silicon film
7
. Due to the presence of the facets
10
, impurities are deeply implanted into both end portions of each source/drain region
8
within the semiconductor substrate
1
, as shown in FIG.
6
(
c
), resulting in a problem in that the formation of a shallow junction is very difficult.
Further, surfaces of the elevated source/drain regions are silicified in order to reduce their electrical resistances. In that case, at end portions of the gate electrode where the elevated layers are thin, a silicide is formed even within the semiconductor substrate
1
, and thus there is a problem that junction characteristics deteriorate.
As described above, when the source and drain
7
are elevated according to the conventional process, the facets
10
are produced, and thus it is very difficult to form favorable junctions. Then, as a solution to reduce the influence of the facets
10
, there is a method by which the facets
10
are filled with polysilicon and the like as disclosed in JP-A-11-74507, for example. However, steps such as deposition of polysilicon and etch back are required. Thus, there is a problem that the production process becomes complicated.
Furthermore, since single-crystal silicon is used for forming the elevated source and drain
7
, there are not only the facets
10
-related problem but also a problem that, in correspondence with production-attributed variations in the thickness of the single-crystal silicon film
7
, there are variations in the junction depths of the source/drain regions
8
in the semiconductor substrate
1
. The problem of the variations in the junction depths of the source/drain regions
8
, which is attributed to the variations in the thickness of the single-crystal silicon films
7
, can be solved by depositing polysilicon in place of single-crystal silicon. This is because polysilicon does not produce a facet during deposition and moreover, the impurity diffusion coefficient of polysilicon is larger than that of single-crystal silicon. Accordingly, the variations in the thickness of the deposited polysilicon film between products hardly affect the junction depths of the source/drain regions.
However, if equipment from which oxygen is sufficiently eliminated is not used in the deposition of polysilicon, a nonuniform native oxide film is produced between the semiconductor substrate and the polysilicon film thus deposited. This native oxide film becomes a diffusion barrier against source/drain impurities implanted later. For that reason, there is a problem that a good junction cannot be obtained. Accordingly, the deposition of silicon must be performed under the condition that oxygen is sufficiently eliminated. However, in the case where oxygen is sufficiently eliminated, without any surface treatment performed on the semiconductor substrate, polysilicon would inherit the crystal orientation of the semiconductor substrate and epitaxially grow, thus causing another problem that a desired polysilicon film cannot be obtained.
DISCLOSURE OF INVENTION
An object of the invention is to provide a method for producing a source/drain elevated type semiconductor device, which method can deposit a polycrystalline conductive film, such as polysilicon, that favors achievement of a shallow source/drain junction depth, and also to provide a semiconductor device produced by the production method.
In order to accomplish the above object, a method for producing a semiconductor device according to the present invention comprises the steps of:
sectioning a surface of a substrate or well region of first conductive type to form an active region and then forming a gate oxide film on the active region;
forming a gate electrode on the gate oxide film;
forming insulating sidewalls on side surfaces of the gate electrode;
implanting ions into a surface of the semiconductor substrate or well region at portions of the active region that are to be source/drain regions, to thereby make these portions amorphous;
depositing a polycrystalline conductive film on the surface of the semiconductor substrate or well region formed with the gate oxide film, the gate electrode and the insulating sidewalls;
performing etch back on the polycrystalline conductive film to form conductive sidewalls on side surfaces of the insulating sidewalls;
implanting high-concentration impurities of second conductive type into the conductive sidewalls; and
diffusing the high-concentration impurities of second conductive type into the semiconductor substrate or well region by a thermal treatment to thereby form the source/drain regions.
With the above constitution, since the surfaces of the portions to become the source and drain regions in the active region of the first conductive type semiconductor substrate or well region are made amorphous, a monocrystal conductive film will not epitaxially grow during the deposition of a polycrystal conductive film on the surface of the semiconductor substrate or well region, but a desired polycrystalline conductive film without any facets is deposited. Therefore, in the case where the semiconductor substrate or well region is a single-crystal

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