Element-isolating construct of a semiconductor integrated circui

Details Element-isolating construct of a semiconductor integrated circui Element-isolating construct of a semiconductor integrated circui

1996-10-15

1999-09-28

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438196, 438218, 438294, 438318, H01L 218238

Patent

active

059602724

ABSTRACT:
The present invention is to provide a semiconductor integrated circuit having bipolar transistor elements with a reduced isolating distance between adjacent transistors and a reduced collector/substrate capacitance. In the surface of a P-type semiconductor substrate, N.sup.+ type regions are formed serving as buried collector regions of bipolar transistors TR1 and TR2. Between the N.sup.+ type regions, a P-type region for element isolation is provided not in contact with the N.sup.+ type regions. A P-type impurity concentration in the peripheral portions of N.sup.+ type regions is equal to that of the semiconductor substrate. The insulating film serving as an element-isolating layer is provided on the P-type region in contact therewith and thus electrically isolates adjacent bipolar transistors.

REFERENCES:
patent: 4637125 (1987-01-01), Iwasaki et al.
patent: 5141881 (1992-08-01), Takada et al.
patent: 5494844 (1996-02-01), Suzuki
Stanley Wolf, Ph.D. "Silicon Processing for the VLSI ERA vol. 2: Process Integration" pp. 28-66 and 498-500 Lattice Press, Sunset Beach, CA, USA.

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