Electrostatic discharge protection structure for deep...

Details Electrostatic discharge protection structure for deep... Electrostatic discharge protection structure for deep...

2005-09-27

2005-09-27

Flynn, Nathan J. (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S361000, C257S388000, C257S485000, C257S576000, C257S587000, C438S585000, C438S587000, C438S588000, C438S592000

Reexamination Certificate

active

06949806

ABSTRACT:
The present disclosure provides a deep submicron electrostatic discharge (ESD) protection structure for a deep submicron integrated circuit (IC) and a method for forming such a structure. The structure includes at least two electrodes separated by a dielectric material, such as a thin gate oxide layer. In some examples, the thin gate oxide may be less than 25 Å thick. A source and drain are positioned proximate to and on opposite sides of one of the electrodes to form a channel. The drain is covered with a silicide layer that enhances the ESD protection provided by the structure. The source may also be covered with a silicide layer. In some examples, the drain may be floating.

REFERENCES:
patent: 6329287 (2001-12-01), Gadepally
patent: 6373109 (2002-04-01), Ahn
patent: 2002/0053704 (2002-05-01), Avery et al.
patent: 2002/0130366 (2002-09-01), Morishita
URL: http://www.eedesign.com/article/showArticle.jhtml?articled=16503875; Verhaege, Koen G., ESD Process Shrinks I/Os Along Core Path, Nov. 6, 2001, 4 pages, CMP Media LLC., Nov. 1, 2001, Issue #13149, p. 22.

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