Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1998-07-24
2001-04-03
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S200000, C438S286000, 43, 43
Reexamination Certificate
active
06211001
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to integrated circuits, and specifically to a structure and method for providing electrostatic discharge protection for integrated circuits containing a salicide component.
BACKGROUND OF THE INVENTION
Silicon based integrated circuits are susceptible to electrostatic discharge (ESD) damage, particularly in the situation where a user of a device containing an integrated circuit develops a static charge on their body and subsequently comes in contact with the device containing the integrated circuit. The electrostatic charge induced in a human body may produce a voltage on the order of 5,000 volts. As most integrated circuits operate at no higher than five volts, an electrostatic discharge from a human body can be a traumatic experience for the integrated circuit. One way to provide an integrated circuit with ESD protection is to build an integrated circuit on a substrate that is less susceptible to damage from ESD. The integrated circuit may be fabricated on bulk silicon substrates, silicon on insulator (SOI) substrates, or separation by implantation of oxygen (SIMOX) substrates.
Electrostatic Discharge (ESD) Protection is generally provided by the addition of a masking step during manufacture of an integrated circuit device to prevent silicidation of a drain region adjacent to the gate electrode. This technique, however, does not provide complete ESD protection, and requires additional steps, time, and expense in the manufacturing process.
SUMMARY OF THE INVENTION
A method of forming an electrostatic discharge protected salicided device includes forming, on a single crystal substrate, a source region, a gate channel and a drain region, wherein the source region and drain region are formed by implanting ions of a first type using a low doping density (LDD) process; depositing a gate oxide layer over the gate channel; masking at least a portion of the drain region and at least a portion of the gate channel and gate oxide layer; implanting ions of a second type to form an area between the source region and gate channel and between the drain region and gate channel thereby to separate the drain region from the gate channel; and forming salicide layers over the drain region and source region, wherein the salicide layers are separated from the gate channel.
It is an object of the invention to provide a CMOS structure with robust ESD protection without using an additional mask.
Another object of the invention is to provide a method of making a robust ESD protected device using a minimal number of steps.
REFERENCES:
patent: 5597758 (1997-01-01), Heim et al.
patent: 5677205 (1997-10-01), Williams et al.
patent: 5937298 (1999-08-01), Hung et al.
patent: 0445756 (1991-09-01), None
patent: 0459770 (1991-12-01), None
patent: 0654830 (1995-05-01), None
patent: 2292480 (1996-02-01), None
S. Voldman et al., Dynamic Threshold Body—and Gate-Coupled SOI ESD Protection Networks, EOS/ESD Symposium 97-210, pp. 3A.2.1-3A.2.11.
D. Krakauer et al., ESD Protection in a 3.3V Sub-Micron Silicided CMOS Technology, EOS/ESD Symposium 92-250, pp. 5B.4.1-5B.4.8.
G. Notermans, On the Use of N-Well Resistors for Uniform Triggering of ESD Protection Elements, EOS/ESD Symposium 97-221, pp. 3A.3.1-3A.3.9.
Elms Richard
Krieger Scott C.
Luu Pho
Rabdau Matthew D.
Ripma David C.
LandOfFree
Electrostatic discharge protection for salicided devices and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electrostatic discharge protection for salicided devices and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrostatic discharge protection for salicided devices and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2536388