Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-05-06
2000-07-04
Nguyen, Hoa T.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714745, 327143, G01R 3128, H03L 700, G06F 1100
Patent
active
060853425
ABSTRACT:
A power-on reset circuit with glitch sensing capabilities is formed as part of the same integrated circuit chip containing other logical circuits. A port included in the integrated circuit chip enables a power-on reset signal generated by the integrated power-on reset circuit to be output from the chip and applied to other chips installed in a single chip or multi-chip electronic system. The power-on reset circuit compares a capacitor stored reset voltage to a reference voltage and outputs the power-on reset signal when the reset voltage falls below the reference voltage. Storage of the reset voltage by the capacitor is controlled by a glitch sensor which detects changes in voltage provided by a power supply in excess of a given threshold and, in response thereto, triggers a capacitor discharge. This causes the reset voltage to fall below the reference voltage, and the power-on reset signal to be output. Furthermore, for synchronously operated systems, the output power-on reset signal is synchronized with an edge of an output clock signal.
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Bjork Christian
Gardenfors Torbjorn
Marholev Bojko
Nguyen Hoa T.
Telefonaktiebolaget L M Ericsson (publ)
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