Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-12-28
2001-07-31
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S501000, C257S413000, C257S384000
Reexamination Certificate
active
06268633
ABSTRACT:
TECHNICAL FIELD
This invention relates to a structure comprising an HV (High Voltage) transistor and an LV (Low Voltage) transistor, as well as to a corresponding manufacturing method, especially in processes wherein a silicide is used.
The invention relates, in particular but not exclusively, to a structure to be integrated into a substrate along with devices which are operated at a high voltage, such as non-volatile memories of the EEPROM and FLASH-EEPROM types.
BACKGROUND OF THE INVENTION
As is well known, current technologies for making semiconductor integrated circuits have enabled the resistance of the interconnections and contact areas in the active areas of the individual devices to be significantly reduced through the use of composite materials comprising silicon and a transition metal such as titanium or tungsten. These composite materials are called silicides, and are used for producing layers with relatively low resistivities.
The formation of a silicide layer over the active areas of MOS transistors comprises the following steps, once the transistor gate has been formed:
implanting first portions of the source and drain regions with dopant at a low concentration;
forming spacer elements adjacent to the gate and the interconnection lines;
implanting second portions, included in the source and drain regions of the transistor, at a high concentration;
depositing a transition metal over the entire surface of the substrate;
carrying out a thermal process wherein the transition metal will react selectively with the substrate surface to yield the silicide.
These process steps result in the silicide layer being also deposited over the polysilicon which forms the gates and interconnections of the transistor, since the etching steps for clearing the active areas of the oxide which is covering them have a similar effect on interconnections provided by polysilicon lines.
These silicide layers cannot be utilized in the manufacturing of high voltage devices, specifically of HV (High Voltage) transistors either of the P-channel or N-channel type, formed using the DE (Drain Extension) technique. In these devices, the source and drain diffusions are provided as lightly doped regions to obtain HV transistors whose breakdown voltage is set sufficiently high to withstand high bias and working voltages.
It is indeed in these regions that, due to their low dopant concentration and relatively small thickness, the process for making silicide layers may develop problems. For example, in carrying out the thermal process for reacting the transition metal layer with the substrate surface, some of the dopant in the substrate is taken up by the silicide layer at the expense of a substrate surface layer, so that in normal operation the silicide will become shorted to the substrate.
SUMMARY OF THE INVENTION
An embodiment of this invention provides a structure of electronic devices comprising high and low voltage transistors, which has such structural features as to allow the high voltage transistors to handle high voltages, while reducing the contact resistances, improving the speed of response of the low voltage transistors, and overcoming the limitations of prior art structures.
The structure of electronic devices is integrated in a semiconductor substrate with a first type of conductivity and includes at least an HV transistor and at least an LV transistor, each having a corresponding gate region. The HV transistor has lightly doped drain and source regions with a second type of conductivity, and the LV transistor has respective drain and source regions with the second type of conductivity, each including a lightly doped portion adjacent to the respective gate region and a second portion which is more heavily doped. The LV transistor has its source and drain regions formed with low resistivity layers.
Another embodiment of the invention is directed to a process for making an integrated structure in a semiconductor substrate comprising at least an HV transistor and at least an LV transistor, each having a corresponding gate region. The process provides: a first implantation of a first type of dopant at a low concentration for forming drain and source regions of the HV transistor and first portions of drain and source regions of the LV transistor; the formation of an oxide layer over an active area of the HV transistor; and a second implantation of the first type of dopant at a higher concentration than in the first implant to form second portions of the source and drain regions of the LV transistor. The process also includes forming a metal layer over a surface of the substrate, followed by thermally treating the metal layer to selectively form a silicide layer over the second portions of the LV transistor
The features and advantages of a structure according to the invention will be apparent from the following description of an embodiment thereof, given by way of example and not of limitation with reference to the accompanying drawings.
REFERENCES:
patent: 4717684 (1988-01-01), Katto et al.
patent: 4814854 (1989-03-01), Tigelaar et al.
patent: 5024960 (1991-06-01), Haken
patent: 5472887 (1995-12-01), Hutter et al.
patent: 5589423 (1996-12-01), White et al.
patent: 5605853 (1997-02-01), Yoo et al.
patent: 5783850 (1998-07-01), Liau et al.
patent: 5850096 (1998-12-01), Izawa et al.
patent: 5883418 (1999-03-01), Kimura
patent: 0 811 983 A1 (1997-12-01), None
patent: 09283643 (1997-10-01), None
Pio Federico
Pizzuto Olivier
Chaudhuri Olik
Galanthay Theodore E.
Ha Nathan W.
Iannucci Robert
Seed IP Law Group PLLC
LandOfFree
Electronic structure comprising high and low voltage... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Electronic structure comprising high and low voltage..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electronic structure comprising high and low voltage... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2485176