Electronic circuit and integrated circuit including scan...

Details Electronic circuit and integrated circuit including scan... Electronic circuit and integrated circuit including scan...

2007-03-15

2010-06-22

Ellis, Kevin L (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S727000

Reexamination Certificate

active

07743297

ABSTRACT:
An integrated circuit with a scan testing circuit which enables reducing power consumption in normal operation mode is provided. A power-supply controller applies a power-supply voltage to internal and external transmission circuits in scan test mode and stops applying the power supply voltage in normal operation mode. Thus, power consumption associated with operations of the internal and external transmission circuits is eliminated, thereby reducing power consumption in normal operation mode.

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Low-Power Scan Design Using First-Level Supply Gating, Swarup Bhunia, Hamid Mahmoodi, Debjyoti Ghosh, Saibal Mukhopadhyay, and Kaushik Roy, Mar. 2005, vol. 13.
Japanese Patent Office issued a Japanese Office Action dated Nov. 4, 2009, Application No. 2006-075050.

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