Electron beam modification of CVD deposited low dielectric...

Details Electron beam modification of CVD deposited low dielectric... Electron beam modification of CVD deposited low dielectric...

2000-02-17

2003-06-24

Chen, Bret (Department: 1762)

Coating processes

Direct application of electrical, magnetic, wave, or...

Pretreatment of substrate or post-treatment of coated substrate

C427S552000, C427S249100, C427S255290

Reexamination Certificate

active

06582777

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention pertains to dielectric films, more particularly the invention concerns the reduction of the dielectric constant of chemical vapor deposited (CVD) films which are useful for the production of microelectronic devices.
2. Description of the Related Art
The semiconductor industry is rapidly decreasing the dimensions and increasing the density of circuitry and electronic components in microelectronic devices, silicon chips and integrated circuits. In addition, integrated circuits are being layered or stacked with ever decreasing insulating layer thickness between each circuitry layer.
In the production of advanced integrated circuits that have minimum feature sizes of 0.25 micrometers and below, problems of interconnect RC delay, power consumption and crosstalk become significant. With these decreasing geometries and device sizes, the semiconductor industry has sought to avoid parasitic capacitance and crosstalk noise caused by inadequate insulating layers in the integrated circuits. One way to achieve the desired low RC delay and higher performance in integrated circuit devices involves the use of dielectric materials in the insulating layers which have a low dielectric constant. The use of low dielectric constant (k) materials for interlevel dielectric and intermetal dielectric applications partially mitigates these problems. Low dielectric constant (low-k) materials reduce the capacitance of the circuit interconnect materials. The device speed is limited in part by the RC delay which is determined by the resistance of the metal used in the interconnect scheme, and the dielectric constant of the insulating dielectric material used between the metal interconnects. Until now, the materials which are contemplated by the industry for having dielectric constants significantly lower than the currently employed dense silica, suffer from disadvantages. Most low dielectric constant material developments use spin-on-glasses and fluorinated plasma chemical vapor deposition SiO
2
with k greater than 3. Some spin-on-glasses have k lower than 3.
The formation of low-k materials for use in interconnect applications can be achieved by either chemical vapor deposition (CVD) or spin on techniques. It is generally accepted that most materials applied to a substrate via CVD or spin coating techniques require a thermal cure process to achieve the desired film properties. Chemically vapor deposited materials such as silicon oxides are frequently used as an insulator or as a gate material on silicon-based integrated circuits, protective coatings, gate insulators for field effect transistors, passivation or inter-metal layers for elemental and compound semiconductor devices, and capacitor dielectrics for memory devices.
The need for a thermal cure, or annealing process, for CVD deposited materials depends on the composition and deposition process of the particular material. The deposition process parameter that is critical for film properties is usually the deposition temperature, or the substrate temperature during deposition. For materials that are deposited at low temperatures, there is a need in some cases for a thermal cure process to achieve the desired film properties. As the required value for the dielectric constant is decreased due to device performance demands, there are competing types of low-k materials, e.g., porous materials, that can be both organic and inorganic, and organic compositions that might include inorganic components. The need for an additional processing step for these types of materials is dependent on several variables. For the porous materials there is a need to insure that the mechanical and physical properties are acceptable (i.e. stress, planarization etc.), especially for damascene processing. For the organic materials, there is a need to insure that the thermal and mechanical properties are sufficient for either subtractive processing or damascene processing. The disadvantage of using a thermal process to achieve the desired film properties of CVD deposited films is that it adds an additional process step, which includes possibly an additional process tool. There is a trend to reduce the total thermal budget of the interconnection process flow. This includes both peak process temperature and total process time at temperature. Thus, most integrated circuit manufacturers would like to reduce the number of thermal process steps as well as the peak process temperature used in the required process steps. Previous approaches to depositing such films have included plasma enhanced chemical vapor deposition (PECVD), electron cyclotron resonance plasma chemical vapor deposition, low pressure chemical vapor deposition (LPCVD) and atmospheric pressure chemical vapor deposition (APCVD), sub-atmospheric chemical vapor deposition (SACVD) or high density plasma chemical vapor deposition (HDP-CVD) using Si precursors.
The reduction of the dielectric constant of the film must maintain the physical properties of the films, while improving their electrical properties, such as reducing failures due to early dielectric breakdowns, enhancing performance as an insulator, and reducing the presence of unwanted electrical charges within the material lattice. Previous attempts to reduce the dielectric constant of CVD films required very long heating times. For example, the dielectric constant of fluorine doped SiO
2
has been reduced by thermally processing the material at 400° C. in Nitrogen for at least 60 minutes. There is an accompanying film shrinkage with this treatment. It has now been found that by applying an electron beam to the CVD deposited material, a reduction in both peak process temperature and total process time may be achieved. The application of the electron beam to the CVD material may induce radical formation and a modification of the material such that the desired film properties can be achieved. It has been unexpectedly found that the dielectric constant of the CVD deposited materials may be reduced by the electron beam process to a value below that attainable by conventional thermal processing. The electron beam is applied at an energy sufficient to treat the entire thickness of the CVD material. The total dose applied would be determined by the desired film properties necessary for the implementation of the specific CVD low-k material. The electron beam process would be carried out at a temperature necessary to achieve the desired properties in the CVD low-k material. Because of the diverse nature of the current CVD low-k materials, and the potential development of future CVD low-k materials, the electron beam process conditions will depend on the particular material under consideration. Thus, a dielectric constant of 3.0 or below can be achieved depending on the composition of the film. This would provide a cost advantage to device manufacturers because they can extend their existing oxide CVD equipment with minimal cost.
The present invention applies an electron beam treatment to the CVD film to reduce the dielectric constant of the film. Because the electrons can penetrate the entire thickness of the film, they can modify the properties through the bulk of the film. The electron beam also modifies oxide films which leads to a more stable film.
SUMMARY OF THE INVENTION
The invention provides a process for forming a dielectric layer on a substrate which comprises chemical vapor depositing a monomeric or oligomeric dielectric precursor in a chemical vapor deposition apparatus, or a reaction product formed from the precursor in the apparatus, onto a substrate, to thus form a layer on a surface of a substrate; optionally heating the layer at a sufficient time and temperature to dry the layer; and then exposing the layer to electron beam radiation, for a sufficient time, temperature, electron beam energy and electron beam dose modify the layer.
The invention also provides a process for reducing the dielectric constant of a chemical vapor deposited dielectric layer on a substrate which comprises exposing t

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