Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-08-24
2001-08-28
Booth, Richard (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C427S097100, C029S852000
Reexamination Certificate
active
06281105
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a paste and more particularly to a paste including an unzippable polymer, solvent and conductive particles for coating electrodes such as C
4
bumps with oxide free conductive particles for applications such as low temperature interconnections between an integrated circuit chip and a substrate made of polymer/filler composites, such as an Fr
4
printed circuit board.
BACKGROUND OF THE INVENTION
With more and more transistors being placed on a chip to increase the number of functions, the number of input/output (I/O) pads per integrated circuit chip has increased significantly. The increase in the number of I/o pads per chip are making traditional bonding methods, such as wire bonding (WB) and tape automated bonding (TAB) difficult. Flip chip attach (FCA), which is usually an area array in contrast to a peripheral array for WB and TAB, is becoming increasingly pervasive due to the number of pads. In FCA, the chip is bumped with a lead-rich Pb/Sn alloy ball using metal deposition through a resist-mask, for example. The bonding of this chip is achieved by self alignment and placing the chip on the substrate which has been covered with high viscosity flux to reduce oxides. The chip is held in place by the flux. The whole assembly (chip and substrate) is subsequently heated in the range from 350 to 400° C. to a temperature which melts the solder forming an interconnect between balls or bumps on a chip and respective pads on a substrate.
Conventionally the substrates were multi-layer ceramic (MLC) structures that could withstand temperatures up to 400° C. Dictated by both the number of pads and lower cost, there is a growing need to attach similar C
4
bumped integrated circuit chips to organic substrates made of polymer/filler composites, such as FR
4
. Such organic substrates degrade at solder reflow temperatures above 300° C. Thus a low temperature joining material is needed to attach the C
4
bumps of a chip to respective substrate pads.
One method to attach electrodes such as C
4
bumped chips to an organic substrate is by capping the C
4
bumps first with a low temperature melting Pb/Sn-eutectic solder such as described in U.S. Ser. No. 08/710992 filed Sep. 25, 1996 by Berger et al. entitled “Method for Making Interconnect for Low Temperature Chip Attachment” (YO996073) and assigned to the assignee herein. The Pb/Sn solder cap over the C
4
bump may be accomplished by vapor depositing the metal components through a resist mask, followed by solder reflow step. The masking process requires expensive alignment and lithographic steps, and the vapor deposition process is costly due to high vacuum processing. The bonding is accomplished by reflowing the Pb/Sn-eutectic solder at temperatures below 250° C. using acidic flux. Subsequently, the flux is removed using organic solvents that may be chloro-fluoro-carbon (CFC) based.
SUMMARY OF THE INVENTION
In accordance with the present invention, a paste is described comprising a solvent for an unzippable polymer, an unzippable polymer dissolved in the solvent to form a solution, and particles suspended in the solution. The particles may be suitable for coating the surface of a selected material; and the polymer may comprise 10 wt. % or greater of the solution.
The invention further provides a coating comprising a substrate and a layer of the paste mentioned above that leaves a layer of particles which may be heated to form an alloy with the substrate material.
The invention further provides a method for testing the integrated circuit chip with C
4
bumps that are coated using the disclosed method. The particles in the paste being conductive and adherent to the C
4
surface will provide a conductive path between the C
4
bumps and conductive pads on the test probe.
The invention further provides a method for coating C
4
electrodes or bumps on an integrated circuit chip comprising the steps of applying a paste mentioned above to the surface of the C
4
electrodes, the particles in the paste being conductive and adherent to the surface of the substrate, and heating the paste to remove the solvent and the unzippable polymer wherein the particles may alloy with the Pb in the C
4
.
The invention provides a low cost C
4
capping method.
The invention provides a method that does not require any lithography, alignment or vacuum processing steps.
The invention provides a bonding process that uses conductive adhesive on the substrate that does not require any flux, hence no cleaning step. The conductive adhesive may typically be a silver or gold filled epoxy.
The invention provides a bonding process using a conductive organic composite that allows for greater thermal mismatch between the chip and the substrate than a solid metal solder joint would.
The invention provides a bonding process that allows flip chip to pads on organic substrates where the mismatch in the thermal coefficient of expansion (TCE) is significantly larger than the TCE between an integrated circuit chip and a ceramic substrate.
The invention provides a testing process that would allow the C
4
bumps to be tested by conventional methods of pressure contact before bonding.
REFERENCES:
patent: 5091346 (1992-02-01), Inoue et al.
patent: 5287620 (1994-02-01), Suzuki et al.
patent: 5314709 (1994-05-01), Doany et al.
patent: 5561622 (1996-10-01), Bertin et al.
patent: 5683529 (1997-11-01), Makihara et al.
patent: 6013713 (2000-01-01), Cotte et al.
Cotte John Michael
Roldan Judith Marie
Sambucetti Carlos Juan
Saraf Ravi F.
Booth Richard
International Business Machines - Corporation
Trepp Robert M.
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