Electrically page erasable and programmable read only memory

Static information storage and retrieval – Read/write circuit – Erase

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Details

365185, 36523003, 3652385, G11C 1604, G11C 800

Patent

active

051093618

ABSTRACT:
An electrically page erasable and programmable read only memory device is an EEPROM device which is erasable page by page, and consists of flash-type floating gate transistors as the memory cells. The memory cell array of the device is divided by a plurality of pages, wherein each page comprises a plurality of bit lines, a plurality of common source lines, and a plurality of word lines. A plurality of erase selection circuits are arranged and correspond to the respective pages in order to erase the cells in a selected page, wherein each erase selection circuit comprises a passing transistor, a gate, a voltage stabilizing transistor, and an erasing line.

REFERENCES:
patent: 4266283 (1981-05-01), Perlegos
patent: 4384349 (1983-05-01), McElroy
patent: 4527256 (1985-07-01), Giebel
patent: 4677590 (1987-06-01), Arakawa
patent: 4698787 (1987-10-01), Mukherjee et al.
patent: 4719598 (1988-01-01), Stockton
patent: 4949309 (1990-08-01), Rao
patent: 4996571 (1991-02-01), Kume et al.

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