Electrically erasable programmable read-only memory cell and...

Details Electrically erasable programmable read-only memory cell and... Electrically erasable programmable read-only memory cell and...

2007-07-31

2007-07-31

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S318000, C257SE21179

Reexamination Certificate

active

11671971

ABSTRACT:
A manufacturing method and a device of an EEPROM cell are provided. The method includes the following steps. First, a tunnel layer and an inter-gate dielectric layer are formed over a surface of a substrate respectively, and a doped region is formed in the substrate under the inter-gate dielectric layer and used as a control gate. Thereafter, a floating gate is formed over the inter-gate dielectric layer and the tunnel layer. Thereafter, a source region and a drain region are formed in the substrate beside two sides of the floating gate under the tunnel layer. Especially, the manufacturing method of the memory cell can be integrated with the manufacturing process of high operation voltage component and low operation voltage component.

REFERENCES:
patent: 5960274 (1999-09-01), Mehta
patent: 6489202 (2002-12-01), Hsu et al.
patent: 6900097 (2005-05-01), Chen et al.

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