Static information storage and retrieval – Read/write circuit – Erase
Patent
1981-11-16
1984-10-23
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Erase
365185, 357 235, G11C 700, G11C 1140
Patent
active
044792034
ABSTRACT:
An electrically erasable programmable read only memory (EEPROM) cell has a floating gate transistor and a select transistor in series. A control gate of the select transistor extends to an area which overlies an extended portion of a floating gate of the floating gate transistor to form an erase window so that the EEPROM cell can be erased by application of an erase signal to the control gate of the select transistor.
REFERENCES:
patent: 3728695 (1973-04-01), Bentchkowsky
patent: 3825946 (1974-07-01), Bentchkowsky
patent: 4099196 (1978-07-01), Simko
patent: 4314265 (1982-02-01), Simko
patent: 4375087 (1983-02-01), Wanlass
Giebel, "An 8K EEPROM Using the SIMOS Storage Cell," IEEE Journal of Solid-State Circuits, vol. SC-15, No. 3, 6/80, pp. 311-314.
Das Gupta et al, "Dual-Gate FAMOS Memory Cell," IBM Tech. Disc. Bul., vol. 17, No. 8, 1/75, p. 2266.
Clingan Jr. James L.
Hecker Stuart N.
Motorola Inc.
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