Electrically alterable non-volatile memory cell

Details Electrically alterable non-volatile memory cell Electrically alterable non-volatile memory cell

2006-08-29

2006-08-29

Dang, Phuc T. (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S315000, C257S321000

Reexamination Certificate

active

07098499

ABSTRACT:
A nonvolatile memory cell is provided. The memory cell includes a storage transistor and an injector in a well of an n-type conductivity. The well is formed in a semiconductor substrate of a p-type conductivity. The storage transistor comprises a source, a drain, a channel, and a charge storage region. The source and the drain are formed in the well and having the p-type conductivity with the channel of the well defined therebetween. The charge storage region is disposed over and insulated from the channel region by an insulator. Further provided are methods operating the memory cell, including means for injecting electrons from the channel through the insulator onto the charge storage region and means for injecting holes from the injector through the well through the channel through the insulator onto the charge storage region. The memory cell can be implemented in a conventional logic CMOS process.

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