Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-03-20
2002-06-04
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S110000, C438S113000, C257S692000
Reexamination Certificate
active
06399415
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to the bulk packaging of integrated circuits. More particularly, the invention relates to processes that facilitate panel testing of leadless IC packages that use a conductive substrate.
A leadless leadframe package (LLP) is a relatively new integrated circuit package design that contemplates the use of a metal (typically copper) leadframe type substrate structure in the formation of a chip scale package (CSP). As illustrated in
FIG. 1
, in typical leadless leadframe packages, a copper leadframe strip or panel
101
is patterned (typically by stamping or etching) to define a plurality of arrays
103
of chip substrate features
105
. Each chip substrate feature
105
includes a die attach pad
107
and a plurality of contacts
109
disposed about their associated die attach pad
107
. Very fine tie bars
111
are used to support the die attach pads
107
and contacts
109
.
During assembly, dice are attached to the respective die attach pads and conventional wire bonding is used to electrically couple bond pads on each die to their associated contacts
109
on the leadframe strip
101
. After the wire bonding, a plastic cap is molded over the top surface of the each array
103
of wire bonded dice. The dice are then singulated and tested using conventional sawing and testing techniques. The dice cannot be tested prior to singulation since the tie bars remain in place and therefor electrically connect the contacts
109
until the devices are separated.
FIG. 2
illustrates a typical resulting leadless leadframe package. The die attach pad
107
supports a die
120
which is electrically connected to its associated contacts
109
by bonding wires
122
. A plastic cap
125
encapsulates the die
120
and bonding wires
122
and fills the gaps between the die attach pad
107
and the contacts
109
thereby serving to hold the contacts in place. It should be appreciated that during singulation, the tie bars
111
are cut and therefore the only materials holding the contacts
109
in place is the molding material. The resulting packaged chip can then be surface mounted on a printed circuit board or other substrate using conventional techniques.
Although leadless leadframe packaging has proven to be a cost effective packaging arrangement, there are continuing efforts to further reduce the costs associated with packaging. One persistent issue in packaging generally is the need and desire to test the packaged devices. In high density packaging applications such as some of the state of the art leadless packaging, it would be advantageous to be able to test the devices in panel form rather than individually after singulation.
SUMMARY OF THE INVENTION
To achieve the foregoing and other objects and in accordance with the purpose of the present invention, a variety of techniques for electrically debussing conductive substrate panels used in the formation of a matrix of leadless integrated circuit packages are described. Generally, a matrix of leadless packages are fabricated in panel form on a conductive substrate panel. The substrate panel has one or more arrays of device areas thereon. Each device area includes a plurality of contacts formed from the substrate panel and which are electrically connected to an associated die (which is optionally supported by a die attach pad formed from the same substrate panel). The conductive substrate panel also defines a plurality of tie bars that support the contacts during fabrication. After the dice have been mounted and electrically connected to their associated contacts, at least one cap is molded over the substrate panel. Each cap is arranged to encapsulate an array of the devices. With this arrangement, the molding material serves to hold the contacts and dice in place relative to one another. After the molding operation, portions of the tie bars are removed to electrically isolate the contacts from one another while leaving sufficient portions of the molded substrate structure in tact to facilitate handling the structure in panel form.
With the described arrangement, the packaged devices may be tested in panel form. After testing and any other desired panel based operations, the packaged devices may be separated using conventional techniques. The removal of the tie bars can be accomplished by any suitable technique including, for example, sawing or etching.
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Leadless Leadframe Package (LLP), National Semiconductor Application Note 1187, Sep. 2000.
Bayan Jaime
Bong Yin Yen
Hu Ah Lek
Kam Harry Cheng Hong
Kang Aik Seng
Beyer Weaver & Thomas LLP
Elms Richard
National Semiconductor Corporation
Wilson Christian D.
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