Electrical connection forming process for semiconductor devices

Details Electrical connection forming process for semiconductor devices Electrical connection forming process for semiconductor devices

1996-09-23

2000-01-04

Quach, T. N.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438586, 438622, 438624, 438637, 438638, 438641, 438671, H01L 2128, H01L 2131

Patent

active

060109556

ABSTRACT:
An etch-less process for forming an electrical connection is disclosed. A resist pattern is formed on a substrate. An insulating layer is formed on the substrate, but not on the resist pattern. The resist pattern is then removed to form an opening in the insulating layer and a conductive layer is formed in the opening. Multiple insulating layers and multiple resist patterns may be used.

REFERENCES:
patent: 4621415 (1986-11-01), Tran
patent: 4939071 (1990-07-01), Barrera et al.
patent: 4963501 (1990-10-01), Ryan et al.
patent: 5158910 (1992-10-01), Cooper et al.
patent: 5171718 (1992-12-01), Ishibashi et al.
patent: 5264382 (1993-11-01), Watanabe
patent: 5300445 (1994-04-01), Oku
patent: 5413668 (1995-05-01), Aslam et al.
patent: 5484747 (1996-01-01), Chien
patent: 5677243 (1997-10-01), Ohsaki

Affiliated with

Also associated with

Rating

Electrical connection forming process for semiconductor devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Electrical connection forming process for semiconductor devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Electrical connection forming process for semiconductor devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1072347